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Mohammad Riaz Khawer

from Wayland, MA
Age ~55
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Also known as:
Mohammad R Khawer, Mohammed R Khawer, Mohamme Khawer, Mohammad Khamer, Khawer Mohamme
Connected to:
Natacha A Khawly, 37Adil Khaya, 47Umar Khayam, 56Mohamed A Khayar, 42Ahmed KhayatChristine S Khayat, 33Derek M Khayat, 40Eulla A Khayat, 52Miriam Khayat, 38Nicholas Khayata, 31

Mohammad Khawer Phones & Addresses

  • Wayland, MA
  • 11 Hill Hollow Rd, Lk Hopatcong, NJ 07849 (973) 663-4083
  • Lake Hopatcong, NJ
  • Scotch Plains, NJ
  • Rahway, NJ
  • Syracuse, NY
  • Clark, NJ

Publications

Us Patents

Dynamic Power Control For A Tdma Based Air Interface

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US Patent:
7058029, Jun 6, 2006
Filed:
Jan 25, 2002
Appl. No.:
10/056950
Inventors:
Mohammad Riaz Khawer - Scotch Plains NJ, US
Padmakumar B. Pillai - Randolph NJ, US
Assignee:
Lucent Technologies Inc. - Murray Hill NJ
International Classification:
H04B 7/185
H04B 7/212
H04J 3/00
H04Q 7/20
US Classification:
370318, 370321, 370337, 370347, 455 134, 455522
Abstract:
The method provides power control in transmitting a downlink signal of frame data in a wireless network. Each frame is composed of timeslots, with each timeslot being further composed of quarter symbols. The method includes mapping each quarter symbol to an offset within a frame attenuation buffer, and computing a template for the frame, each step being performed only once. The template is used for filling the attenuation buffer with attenuation values to attenuate the transmit power for the downlink signal. Attenuation values are provided for each quarter symbol in a frame, although a computation is not required for each quarter symbol. The attenuation values are grouped in blocks that are recursively copied into the frame attenuation buffer based on the template. The contents of a filled attenuation buffer are output for use in attenuating the transmit power of the frame.

Method For Provisioning A Permanent Virtual Circuit In An Atm Network

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US Patent:
7292599, Nov 6, 2007
Filed:
Mar 25, 2003
Appl. No.:
10/396773
Inventors:
Mohammad Riaz Khawer - Scotch Plains NJ, US
Paul Lopreiato - Nutley NJ, US
Assignee:
Lucent Technologies - Murray Hill NJ
International Classification:
H04L 12/66
US Classification:
370463, 370252, 370399
Abstract:
A permanent virtual circuit (PVC) over an ATM network is provisioned by using a deterministic PVC addressing scheme for computing a unique combination of VPI and VCI values based on certain input parameters associated with the network to which the PVC is logically connected. Specifically, the VPI and VCI of a PVC are deterministically computed as a known function of numerical values of particular network elements associated with the network and the particular PVC being provisioned using a function that enables the values of these network elements to be uniquely determined from the VPI and VCI of the PVC. Thus, once the VPI and VCI are determined for a PVC, the particular network elements associated with that PVC can be unambiguously identified from their values.

Multi-Link Load Balancing For Reverse Link Backhaul Transmission

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US Patent:
8325735, Dec 4, 2012
Filed:
Jun 28, 2007
Appl. No.:
11/819620
Inventors:
Mohammad Riaz Khawer - Lake Hopatcong NJ, US
Mark H. Kraml - Flanders NJ, US
Stephen George Pisano - Keswick VA, US
Tomas S. Yang - Parsippany NJ, US
Assignee:
Alcatel Lucent - Paris
International Classification:
H04L 12/56
US Classification:
37039542, 370413, 370415, 370417, 370444
Abstract:
One embodiment includes distributing user traffic packets to a plurality of queues, and draining the queues of the user traffic packets according to a defined methodology. The drained user traffic packets are sent to a plurality of physical channel interfaces. Each of the plurality of physical channel interfaces interfaces with a respective channel of the backhaul. The sending step sends each of the drained user traffic packets to the physical channel.

Lock-Less Buffer Management Scheme For Telecommunication Network Applications

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US Patent:
8504744, Aug 6, 2013
Filed:
Oct 28, 2010
Appl. No.:
12/914135
Inventors:
Mohammad R. Khawer - Lake Hopatcong NJ, US
Lina So - East Brunswick NJ, US
Assignee:
Alcatel Lucent - Paris
International Classification:
G06F 3/00
G06F 5/00
US Classification:
710 56, 710 52, 710 36
Abstract:
A buffer management mechanism in a multi-core processor for use on a modem in a telecommunications network is described herein. The buffer management mechanism includes a buffer module that provides buffer management services for one or more Layer 2 applications, wherein the buffer module at least provides a user space application interface to application software running in user space. The buffer management mechanism also includes a buffer manager that manages a plurality of separate pools of tokens, wherein the tokens comprise pointers to memory areas in external memory. In addition, the buffer management mechanism includes a custom driver that manages Data Path Acceleration Architecture (DPAA) resources including buffer pools and frame queues to be used for user plane data distributing.

Apparatus For Multi-Cell Support In A Network

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US Patent:
8634302, Jan 21, 2014
Filed:
Jul 30, 2010
Appl. No.:
12/847414
Inventors:
Mohammad R. Khawer - Lake Hopatcong NJ, US
Shriram K. Easwaran - Randolph NJ, US
Assignee:
Alcatel Lucent - Paris
International Classification:
H04L 12/28
H04L 12/40
H04L 12/66
G06F 15/167
G06F 15/76
US Classification:
370238, 370400, 370438, 370463, 709212, 712 32
Abstract:
An apparatus for providing multi-cell support in a telecommunications network is described. The apparatus includes a modem board and a multi-core processor having a plurality of processor cores attached to the modem board. A single partition is defined with all of the processor cores included in it. The single partition is used to execute all control plane functions and all data plane functions. Typically, the multi-core processor is configured to include a core abstraction layer that hides any core specific details from application software running on the processor cores in the single partition and to serve at least three cells in the telecommunications network, each cell having a corresponding uplink scheduler and a corresponding downlink scheduler. In this configuration there is no need to use a hypervisor, since there is only one OS instance running (a potential cost saving).

Software Circuit Switching Router Using Anchor Channels

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US Patent:
20020122384, Sep 5, 2002
Filed:
Jan 16, 2001
Appl. No.:
09/759887
Inventors:
Mohammad Khawer - Scotch Plains NJ, US
International Classification:
H04L001/00
US Classification:
370/216000, 370/351000
Abstract:
Software defined radios necessitate the routing of analog wireless signals between data links via a software circuit switching router implemented in a processor. Processor utilization by the software router is decreased by disabling the interrupts of all but one analog channel per communication link, this channel being termed the Anchor channel for its link. Data from all channels in the link is transferred during the Anchor link's interrupt. The increase in the Anchor channel's interrupt latency due to transferring data from other channels is more than offset by the overall reduction in the number of processor interrupts generated. As a result, utilization of the processor by the software router is reduced, allowing the processor to manage other time-critical tasks and/or a greater number of tasks in a given time period.

Core Abstraction Layer For Telecommunication Network Applications

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US Patent:
20120093047, Apr 19, 2012
Filed:
Oct 14, 2010
Appl. No.:
12/904322
Inventors:
Mohammad R. Khawer - Lake Hopatcong NJ, US
Lina So - East Brunswick NJ, US
International Classification:
H04B 7/00
US Classification:
370310
Abstract:
A new sub-system, the core abstraction layer (CAL), is introduced to the middleware layer of the multi-core processor based modem board. This new module provides an abstraction for the multi-core FSL P4080 processor and its DPAA. For the deployment of this modem board, the CAL will provide various services such as zero copy lock free buffer management scheme to LTE L2 application, and the support for the new backplane Ethernet driver (BED) interface for the RLC SDU transmission and reception to and from the controller board for multi-cell configuration.

Lock-Less And Zero Copy Messaging Scheme For Telecommunication Network Applications

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US Patent:
20120120965, May 17, 2012
Filed:
Nov 12, 2010
Appl. No.:
12/945146
Inventors:
Mohammad R. Khawer - Lake Hopatcong NJ, US
Lina So - East Brunswick NJ, US
International Classification:
H04L 12/56
G06F 13/24
US Classification:
370412, 710263
Abstract:
A computer-implemented system and method for a lock-less, zero data copy messaging mechanism in a multi-core processor for use on a modem in a telecommunications network are described herein. The method includes, for each of a plurality of processing cores, acquiring a kernel to user-space (K-U) mapped buffer and corresponding buffer descriptor, inserting a data packet into the buffer; and inserting the buffer descriptor into a circular buffer. The method further includes creating a frame descriptor containing the K-U mapped buffer pointer, inserting the frame descriptor onto a frame queue specified by a dynamic PCD rule mapping IP addresses to frame queues, and creating a buffer descriptor from the frame descriptor.
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Mohammad Riaz Khawer from Wayland, MA, age ~55 Get Report