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Milad X Alwardi

from Allen, TX
Age ~66

Milad Alwardi Phones & Addresses

  • 1404 Oakwood Dr, Allen, TX 75013 (214) 383-1565 (214) 495-1403 (972) 727-5732
  • Plano, TX
  • 533 Lookout Dr, Richardson, TX 75080 (972) 437-5971
  • 539 Lookout Dr, Richardson, TX 75080 (972) 437-5971
  • Cleveland, OH
  • Tucson, AZ
  • Colton, TX
  • Goleta, CA
  • Dallas, TX

Resumes

Resumes

Milad Alwardi Photo 1

Senior Staff Analog And Mixed-Signal Design Engineer

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Location:
Allen, TX
Industry:
Semiconductors
Work:
Stmicroelectronics
Senior Staff Analog and Mixed-Signal Design Engineer
Education:
University of Arizona
Doctorates, Doctor of Philosophy, Electronics Engineering, Philosophy
Skills:
Microelectronics
Design
Signal Design
Analog
Milad Alwardi Photo 2

Milad Alwardi

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Publications

Us Patents

Apparatus And Method For Measuring A Parameter In A Host Device

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US Patent:
6768951, Jul 27, 2004
Filed:
Aug 22, 2002
Appl. No.:
10/225620
Inventors:
Milad Alwardi - Allen TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 1900
US Classification:
702 63, 702 62, 702 81, 702182
Abstract:
An apparatus receives an indicating signal representing a parameter at a monitoring locus and includes: (a) A first measuring unit having a first input coupled for selectively receiving the indicating signal and presenting a first output signal that includes a first monitoring signal representing change in the indicating signal during a first time interval and a first benchmark signal indicating change imparted to signals by the first measuring unit. (b) A second measuring unit having a second input coupled for selectively receiving the indicating signal and presenting a second output signal that includes a second monitoring signal representing change in the indicating signal during a second time interval and a second benchmark signal indicating change imparted to signals by the second measuring unit. (c) An accumulating and indicator unit coupled for receiving and evaluating the first and second output signals and generating an indicator signal that represents the evaluating.

Passive Clock Detector

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US Patent:
7863944, Jan 4, 2011
Filed:
Mar 10, 2009
Appl. No.:
12/400909
Inventors:
Zhengyu Wang - Plano TX, US
Milad Alwardi - Allen TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03K 5/00
US Classification:
327 97, 327 64
Abstract:
A clock detector is provided. The clock detector generally comprises a filter, a first branch, a second branch, a latch, and logic. The filter is adapted to receive a clock signal and is coupled to a low threshold inverter in the first branch and a high threshold inverter in the second branch. The latch is adapted to receive the clock signal and is coupled to the first branch, while the logic is coupled to the node between the first branch and the latch, an output of the latch, and the second branch so that it can output a clock detection signal.

Dynamic Trimming Technique For Variations In Oscillator Parameters

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US Patent:
20030231021, Dec 18, 2003
Filed:
Jun 12, 2002
Appl. No.:
10/166935
Inventors:
Milad Alwardi - Allen TX, US
J. Cooper - Murphy TX, US
International Classification:
H03L007/00
US Classification:
324/360000, 324/100000, 331/100000
Abstract:
Systems and methods are provided for adjusting the frequency of an oscillator to compensate for oscillator frequency variations resulting from changes in oscillator parameters. Measurement systems monitor one or more oscillator parameters. The capacitance of the oscillator is selectively adjusted based on the measurement of the one or more oscillator parameters. The change in capacitance compensates for changes in environmental and operating conditions that affect the oscillator parameters, such as temperature and applied voltage, and produces a relatively stable output frequency over a specified operating range.

Battery Monitoring Circuit With Storage Of Charge And Discharge Accumulation Values Accessible Therefrom

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US Patent:
59659971, Oct 12, 1999
Filed:
Aug 20, 1997
Appl. No.:
8/915019
Inventors:
Milad Alwardi - Richardson TX
Wallace Edward Matthews - Richardson TX
Dave Heacock - Plano TX
David Louis Freeman - Plano TX
Assignee:
Benchmarq Microelectronics - Dallas TX
International Classification:
H01M 1046
H01M 1044
US Classification:
320132
Abstract:
A battery charge/discharge monitor circuit (10) is operable to be disposed in a battery pack (12) which can be connected to a battery (13). The monitor circuit (10) is operable to be connected to an external CPU (24) or similar system through a single wire communication port (22) for transferring information back and forth. There is also provided an external signal on a line (30) for indicating charge or discharge activity in the monitor circuit (10). The monitor circuit (10) is operable to collect information regarding the amount of charge input to the battery and the length of time that the charge is input to the battery and also the amount of charge that is removed from the battery and the length of time that the charge is removed. This information is stored in a memory block (62) for later access by the external CPU (24). This system also provides offset information to provide some type of compensation for non-linearities of the part.

Mems Gyroscope Control Circuit

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US Patent:
20200408525, Dec 31, 2020
Filed:
Jun 26, 2019
Appl. No.:
16/452850
Inventors:
- Coppell TX, US
Chao-Ming TSAI - Southlake TX, US
Milad ALWARDI - Allen TX, US
Yamu HU - Allen TX, US
David MCCLURE - Carrollton TX, US
Assignee:
STMicroelectronics, Inc. - Coppell TX
International Classification:
G01C 19/5726
G01C 19/5733
G01C 25/00
Abstract:
A microelectromechanical system (MEMS) gyroscope includes a driving mass and a driving circuit that operates to drive the driving mass in a mechanical oscillation at a resonant drive frequency. An oscillator generates a system clock that is independent of and asynchronous to the resonant drive frequency. A clock generator circuit outputs a first clock and a second clock that are derived from the system clock. The drive loop of the driving circuit including an analog-to-digital converter (ADC) circuit that is clocked by the first clock and a digital signal processing (DSP) circuit that is clocked by the second clock.

Dac With Sub-Dacs And Related Methods

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US Patent:
20160182079, Jun 23, 2016
Filed:
Dec 17, 2014
Appl. No.:
14/573083
Inventors:
- Coppell TX, US
Milad ALWARDI - Allen TX, US
International Classification:
H03M 1/68
Abstract:
A DAC may include a decoder configured to receive a digital input signal, and first and second sub-DACs coupled in parallel to the decoder, each of the first and second sub-DACs having first and second LSB banks, and an MSB bank coupled between the first and second LSB banks. The decoder may be configured to selectively control the first and second LSB banks, and the MSB bank based upon the digital input signal. The DAC may include an output network coupled to the first and second sub-DACs and configured to generate an analog output signal related to the digital input signal.
Milad X Alwardi from Allen, TX, age ~66 Get Report