Mihai Horia Murgulescu

8442476, May 14, 2013

Jul 20, 2007

11/781195

George T. Haber - Los Altos Hills CA, US
Mihai H. Murgulescu - San Jose CA, US

Cresta Technology Corporation - Santa Clara CA

H04B 1/16

4553433, 455 6711, 455 73, 4555521

According to some embodiments, an analog radio receiver circuit is configured alternatively in a full-power mode when the receiver is situated in a cradle and connected to an external power source, and in a power-saving mode when the receiver is not connected to the external power source. In the power-saving mode, a scaled-down power level is supplied to an analog radio signal processing circuit component such as an amplifier, filter, oscillator, or mixer. Scaling down the power supplied to analog circuit components allows reducing their power consumption, at the expense of degraded circuit performance (e. g. increased non-linearity and intermodulation, decreased filter selectivity). Switching between full-power and power-saving modes may be achieved by controlling the connection of internal nodes of the signal processing circuit to a power source, and/or inserting circuit components (e. g. resistors, active devices, filter poles) into the signal processing circuit.

8503969, Aug 6, 2013

Jan 25, 2013

13/750506

Mihai H. Murgulescu - San Jose CA, US

Cresta Technology Corporation - Santa Clara CA

H04B 1/16

4553431, 455 73, 455130

According to some embodiments, an analog radio receiver circuit is configured alternatively in a full-power mode when the receiver is situated in a cradle and connected to an external power source, and in a power-saving mode when the receiver is not connected to the external power source. In the power-saving mode, a scaled-down power level is supplied to an analog radio signal processing circuit component such as an amplifier, filter, oscillator, or mixer. Scaling down the power supplied to analog circuit components allows reducing their power consumption, at the expense of degraded circuit performance (e. g. increased non-linearity and intermodulation, decreased filter selectivity). Switching between full-power and power-saving modes may be achieved by controlling the connection of internal nodes of the signal processing circuit to a power source, and/or inserting circuit components (e. g. resistors, active devices, filter poles) into the signal processing circuit.

20020145481, Oct 10, 2002

Feb 27, 2001

09/793934

Mihai Murgulescu - San Jose CA, US

H03B005/12

331/11700R, 331/167000

Methods and apparatus to control and enhance the quality factor of a tank circuit and oscillators having a tank circuit by feeding back a voltage to the tank circuit in opposition to the losses in the tank circuit. In an exemplary embodiment, a degenerate common emitter stage, responsive to the voltage across a differential circuit, has magnetically coupled inductors coupling voltages back to a differential tank in opposition to the IR voltage losses in the differential tank circuit. The amount of feedback may be controlled by the bias on the common emitter stage. Various embodiments are disclosed.

20050117663, Jun 2, 2005

Sep 3, 2004

10/933647

Serge Drogi - Phoenix AZ, US
Mihai Murgulescu - San Jose CA, US
Hans Dropmann - Emerald Hills CA, US

H04B015/00

375316000

A digital audio radio system includes a radio frequency (RF) integrated circuit (IC) and a baseband digital signal processing (DSP) IC to receive digital audio radio signals from satellites and terrestrial antennae. A serial digital interface couples data between the RF IC and the baseband DSP IC to provide a high data rate and low noise. In one embodiment, the RF IC has a single bit sigma delta modulator to convert an analog signal into a serial digital bit stream, and a low voltage differential output driver to reduce the output voltage swing of the serial digital bit stream. The DSP IC has a low voltage differential input receiver to increase the output voltage swing of the serial digital bit stream in the DSP IC, a decimator to lower the data rate of the serial digital bit stream, and a demodulator to convert the serial digital bit stream into parallel digital data samples for digital signal processing by the DSP IC.