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Mallikarjuna R Chilakala

from Portland, OR

Mallikarjuna Chilakala Phones & Addresses

  • 16455 SW Tuscany St, Portland, OR 97223 (503) 844-6639
  • 1316 Carlaby Way, Hillsboro, OR 97124 (503) 844-6639
  • Gaithersburg, MD

Work

Company: Hughes network systems Sep 1999 to Feb 2001 Position: Software engineer

Education

Degree: Master of Science, Masters School / High School: Indian Institute of Technology, Roorkee 1995 to 1997 Specialities: Computer Science

Skills

Embedded Software • Distributed Systems • Computer Architecture • Linux • Debugging • Perl • 3Gpp • Arm • Pcie • Processors • Android Development • Linux Kernel • Kernel • Embedded Linux • Embedded Systems • Soc • Software Engineering • Multithreading • Firmware • Software Development • Device Drivers • Rtos • Architecture • System Architecture

Emails

Industries

Computer Networking

Resumes

Resumes

Mallikarjuna Chilakala Photo 1

System Architect

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Location:
Santa Clara, CA
Industry:
Computer Networking
Work:
Hughes Network Systems Sep 1999 - Feb 2001
Software Engineer

Intel Corporation Sep 1999 - Feb 2001
System Architect

Nokia Bell Labs Jan 1999 - Sep 1999
Software Engineer

Center For Development of Telematics (C-Do T) Mar 1997 - Jan 1999
Research Engineer
Education:
Indian Institute of Technology, Roorkee 1995 - 1997
Master of Science, Masters, Computer Science
Nagarjuna University 1990 - 1994
Bachelors, Bachelor of Science, Computer Engineering, Electronics
Skills:
Embedded Software
Distributed Systems
Computer Architecture
Linux
Debugging
Perl
3Gpp
Arm
Pcie
Processors
Android Development
Linux Kernel
Kernel
Embedded Linux
Embedded Systems
Soc
Software Engineering
Multithreading
Firmware
Software Development
Device Drivers
Rtos
Architecture
System Architecture

Publications

Us Patents

Dynamic Receive Queue Balancing

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US Patent:
20110142064, Jun 16, 2011
Filed:
Dec 15, 2009
Appl. No.:
12/638538
Inventors:
Scott P. Dubal - Beaverton OR, US
Patrick Connor - Beaverton OR, US
Mallikarjuna R. Chilakala - Tigard OR, US
International Classification:
H04L 12/56
US Classification:
370412
Abstract:
A method according to one embodiment includes the operations of assigning a network application to at least one first core processing unit, from among a plurality of core processing unit. The method of this embodiment also includes the operations of assigning a first receive queue to said first core processing unit, wherein the first receive queue is configured to receive packet flow associated with the network application; defining a high threshold for the first receive queue; and monitoring the packet flow in the first receive queue and comparing a packet flow level in the first receive queue to the high threshold; wherein if the packet flow level exceeds the threshold based on the comparing, generating a queue status message indicating that the packet flow level in the first queue has exceeded the queue high threshold.

Augmented Reality Electronic Book Mechanism

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US Patent:
20160378296, Dec 29, 2016
Filed:
Jun 25, 2015
Appl. No.:
14/750259
Inventors:
Ashok Mishra - Portland OR, US
Rajesh Poornachandran - Portland OR, US
Saurabh Dadu - Tigard OR, US
Ravikiran Chukka - Portland OR, US
Mallikarjuna Chilakala - Tigard OR, US
International Classification:
G06F 3/0481
G06T 11/00
G06T 15/00
G06F 1/16
G06F 17/30
G06T 19/00
G06F 3/01
Abstract:
A method is described to facilitate augmented reality. The method includes receiving image data from a book, extracting features from the image data as the book as being read, comparing the extracted features to previously stored data in the database, retrieving page data associated with the extracted features upon detecting a comparison match, overlaying the page data on a book page currently being viewed and displaying the page data on the book page currently being viewed.
Mallikarjuna R Chilakala from Portland, OR Get Report