Lyndon Ronald Dr Logan

6686252, Feb 3, 2004

Mar 10, 2001

09/803117

Lyndon R. Logan - Essex Junction VT
James A. Slinkman - Montpelier VT

International Business Machines Corporation - Armonk NY

H01L 2176

438400, 438433

A method of forming a semiconductor device with improved leakage control, includes: providing a semiconductor substrate; forming a trench in the substrate; forming a leakage stop implant in the substrate under the bottom of the trench and under and aligned to a sidewall of the trench; filling the trench with an insulator; and forming an N-well (or a P-well) in the substrate adjacent to and in contact with an opposite sidewall of the trench, the N-well (or the N-well) extending under the trench and forming an upper portion of an isolation junction with the leakage stop implant, the upper portion of the isolation junction located entirely under the trench. The leakage control implant is self-aligned to the trench sidewalls.

6756637, Jun 29, 2004

Jul 6, 2001

09/899957

James W. Adkisson - Jericho VT
Michael J. Hargrove - Clinton Corners NY
Lyndon R. Logan - Essex Junction VT
Isabel Y. Yang - Hopewell Junction NY

International Business Machines Corporation - Armonk NY

H01L 2976

257345, 257344, 257347, 257408

High performance asymmetric transistors including controllable diode characteristics at the source and/or drain are developed by supplying impurities with high accuracy of location by angled implants in a trench or diffusion from a solid body formed as a sidewall of doped material. High concentration gradient of impurities to support high performance is achieved by providing for reduced heat treatment after the impurity is supplied in order to limit diffusion previously necessary to achieve the desired location of impurity structures. Damascene or quasi-Damascene gate structures are also provided for high dimensional uniformity, increased manufacturing yield and structural integrity of the transistor.

6946710, Sep 20, 2005

Oct 16, 2003

10/687295

Lyndon R. Logan - Essex Junction VT, US
James A. Slinkman - Montpelier VT, US

International Business Machines Corporation - Armonk NY

H01L029/772

257372

A method of forming a semiconductor device with improved leakage control, includes: providing a semiconductor substrate; forming a trench in the substrate; forming a leakage stop implant in the substrate under the bottom of the trench and under and align to a sidewall of the trench; filling the trench with an insulator; and forming an N-well (or a P-well) in the substrate adjacent to and in contact with an opposite sidewall of the trench, the N-well (or the P-well) extending under the trench and forming an upper portion of an isolation junction with the leakage stop implant, the upper portion of the isolation junction located entirely under the trench. The leakage control implant is self-aligned to the trench sidewalls.

7587298, Sep 8, 2009

Oct 12, 2007

11/871368

Lyndon R. Logan - Poughkeepsie NY, US

International Business Machines Corporation - Armonk NY

H01L 41/00

702182, 365226, 324719, 324765, 324769, 324537, 438 14, 438 17, 327516

A diagnostic method of and computer system for root-cause analysis of performance variations of FETs in integrated circuits and a method and computer system for monitoring a field effect transistor manufacturing process. The diagnostic method includes measuring source currents in the linear and saturated regions of two FETs, calculating ratios of the source currents in the linear and saturated regions for the and two FETs and comparing the ratios of the two FETs to determine a probable root cause for a performance variation between the two FETs. One of the FETs has a known good performance.

8000935, Aug 16, 2011

May 27, 2009

12/472704

Lyndon R. Logan - Hopewell Junction NY, US

International Business Machines Corporation - Armonk NY

G06F 11/30

702182, 365226, 324719, 324765, 324537, 324769, 438 14, 438 17, 327516

A diagnostic method of and computer system for root-cause analysis of performance variations of FETs in integrated circuits and a method and computer system for monitoring a field effect transistor manufacturing process. The diagnostic method includes measuring source currents in the linear and saturated regions of two FETs, calculating ratios of the source currents in the linear and saturated regions for the and two FETs and comparing the ratios of the two FETs to determine a probable root cause for a performance variation between the two FETs. One of the FETs has a known good performance.

20040173847, Sep 9, 2004

Mar 22, 2004

10/805442

James Adkisson - Jericho VT, US
Michael Hargrove - Clinton Corners NY, US
Lyndon Logan - Essex Junction VT, US
Isabel Yang - Hopewell Junction NY, US

H01L021/336

257/336000

High performance asymmetric transistors including controllable diode characteristics at the source and/or drain are developed by supplying impurities with high accuracy of location by angled implants in a trench or diffusion from a solid body formed as a sidewall of doped material. High concentration gradient of impurities to support high performance is achieved by providing for reduced heat treatment after the impurity is supplied in order to limit diffusion previously necessary to achieve the desired location of impurity structures. Damascene or quasi-Damascene gate structures are also provided for high dimensional uniformity, increased manufacturing yield and structural integrity of the transistor.

20130161615, Jun 27, 2013

Dec 22, 2011

13/334632

Lyndon R. Logan - Poughkeepsie NY, US
Edward J. Nowak - Essex Junction VT, US
Robert R. Robison - Colchester VT, US

International Business Machines Corporation - Armonk NY

H01L 23/58
H01L 21/66

257 48, 438 17, 257E23002, 257E21531

A plurality of diode/resistor devices are formed within an integrated circuit structure using manufacturing equipment operatively connected to a computerized machine. Each of the diode/resistor devices comprises a diode device and a resistor device integrated into a single structure. The resistance of each of the diode/resistor devices is measured during testing of the integrated circuit structure using testing equipment operatively connected to the computerized machine. The current through each of the diode/resistor devices is also measured during testing of the integrated circuit structure using the testing equipment. Then, response curves for the resistance and the current are computed as a function of variations of characteristics of transistor devices within the integrated circuit structure and/or variations of manufacturing processes of the transistor devices within the integrated circuit structure.

61440817, Nov 7, 2000

Oct 11, 1995

8/540961

Louis Lu-Chen Hsu - Fishkill NY
Chang-Ming Hsieh - Fishkill NY
Lyndon Ronald Logan - Wappingers Falls NY
Jack Allan Mandelman - Stormville NY
Seiki Ogura - Hopewell Junction NY

International Business Machines Corporation - Armonk NY

H01L 2976
H01L 2994
H01L 31062
H01L 31113

257397

A field effect transistor (FET) device, which mitigates leakage current induced along the edges of the FET device, is isolated by shallow trench isolation having a channel width between a first and a second shallow trench at a first and second shallow trench edges. A gate extends across the channel width between the first and second shallow trenches. The gate has a first length at the shallow trench edges and a second length less than the first length between the shallow trench edges. The first length and the second length are related such that the threshold voltage, V. sub. t, at the shallow trench edges is substantially equal to V. sub. t between the shallow trench edges. The gate structure of the FET device is produced using a unique phase shift mask that allows the manufacture of submicron FET devices with very small channel lengths.