Inventors:
- San Jose CA, US
John M. Hughes - Hartford CT, US
Lucio Lanza - Palo Alto CA, US
Mohamed K. Kassem - Carlsbad CA, US
Michael S. Wishart - Hillsborough CA, US
Rajeev Srivastava - Austin TX, US
Risto Bell - San Jose CA, US
Robert Timothy Edwards - Poolesville MD, US
Sherif Eid - Sunnyvale CA, US
Greg P. Shaurette - Tahoe City CA, US
International Classification:
G06F 30/39
G06F 30/30
G06F 30/33
G06F 30/367
G06F 30/392
G06F 30/398
G06F 30/3323
H01L 23/00
Abstract:
Systems and methods for obfuscating a circuit design are described. One of the methods includes receiving the circuit design from a user computing device. The circuit design includes a plurality of circuit components. The method further includes obfuscating each of the circuit components by transforming layout features associated with the circuit design into a generic layout feature representation. The generic layout feature representation excludes scaled representations of the layout features. The method also includes generating a visual representation of the obfuscated designs. Each of the obfuscated designs has an input port and an output port. The method further includes enabling placement of the obfuscated designs and routing between the input ports and the output ports of the obfuscated designs. The method includes generating an obfuscated integrated circuit design having a master input port, a master output port, the obfuscated designs, and the routing between the obfuscated designs.