Lin Wu

6456211, Sep 24, 2002

Jan 8, 2001

09/757106

Lin Wu - Ames IA
Richard Knight Hester - McKinney, Collin County TX

Texas Instruments Incorporated - Dallas TX

H03M 110

341120, 341155

A system ( ) for calibrating data converters ( ) includes a data converter ( ) that receives an input signal and generates one or more pre-digital error correction codes from the input signal. A calibrator ( ) receives the pre-digital error correction codes, formulating one or more transition voltage expressions using the pre-digital error correction codes, and compares the transition voltage expressions to one or more measured transition voltage values to generate one or more calibrated values. More specifically, the data converter ( ) may be a pipelined analog-to-digital converter ( ).

6768356, Jul 27, 2004

Sep 7, 2000

09/656763

Lin Wu - Ames IA
William C. Black - Ames IA

Iowa State University Research Foundation, Inc. - Ames IA

H03L 706

327156, 327158, 327245, 327251

In accordance with a preferred embodiment, a time-interleaved (or multi-phase) architecture is provided having individual control of a plurality of output signals or phases. The time-interleaved architecture may be implemented using a first set of delay cells such as those in a ring oscillator or a delay line device receiving overall control of its output signals by a global control signal. The global control signal may be issued by a phase-locked loop, delay-locked loop, or other like structure. A second set of delay cells is provided to further delay the output signals produced by the first set of delay cells. The second set of delay cells are controlled by individual control signals uniquely calibrated in accordance with a preferred embodiment of the invention to provide uniform (or substantially) uniform time spacing between output signals.