Li Ping Guo

7820858, Oct 26, 2010

Mar 26, 2007

11/691249

Yonggui Chi - Berkeley CA, US
Samuel H. Gellman - Madison WI, US
William C. Pomerantz - Madison WI, US
William S. Horne - Madison WI, US
Li Guo - Madison WI, US
Emily P. English - Madison WI, US

Wisconsin Alumni Research Foundation - Madison WI

C07C 213/00
C07C 215/28
C07C 271/22
C07C 269/06
C07C 217/64
C07D 209/14
C07D 209/26

562553, 562531

The present invention provides a method for the synthesis of β-amino acids. The method also provides methods yielding α-substituted β-amino aldehydes and β-substituted γ-amino alcohols. The present method according to this invention allows for increased yield and easier purification using minimal chromatography or crystallization. The methods described herein are based on an aldehyde aminomethylation which involves a Mannich reaction between an aldehyde and a formaldehyde-derived N,O-acetal (iminium precursor) and a catalyst, such as, for example, L-proline or a pyrrolidine. The invention allows for large scale, commercial preparation of β-amino acids.

20200045658, Feb 6, 2020

Oct 9, 2019

16/597757

- Suwon-si, KR
Vikram Chandrasekhar - Mountain View CA, US
Li Guo - Allen TX, US
Hao Chen - Allen TX, US

H04W 56/00
H04W 48/12
H04L 5/00
H04J 11/00
H04W 72/04
H04W 72/12

A method of user equipment (UE) for system information transmission in a wireless communication system is provided. The method comprises receiving, from a base station (BS), a synchronization signal/physical broadcasting channel (SS/PBCH) block comprising a PBCH that carries a master information block (MIB) including an SIB1 CORESET configuration, wherein the SIB1 CORESET configuration comprises a frequency location, a number of resource blocks (RBs) comprising an SIB1 CORESET associated with the SS/PBCH block, and information of time domain resources of the SIB1 CORESET, determining an initial active bandwidth part (BWP) comprising the frequency location, the number of RBs comprising the SIB1 CORESET, and a numerology of remaining minimum system information (RMSI), and receiving, from the BS, a physical downlink control channel (PDCCH) mapped to at least one time-frequency resource within the SIB1 CORESET, wherein the PDCCH includes scheduling information of a physical downlink shared channel (PDSCH) containing an SIB 1.

20180192383, Jul 5, 2018

Dec 28, 2017

15/856752

- Gyeonggi-do, KR
Vikram Chandrasekhar - Mountain View CA, US
Li Guo - Allen TX, US
Hao Chen - Allen TX, US

H04W 56/00
H04W 72/04
H04W 72/12
H04L 5/00

A method of user equipment (UE) for system information transmission in a wireless communication system is provided. The method comprises receiving, from a base station (BS), a synchronization signal/physical broadcasting channel (SS/PBCH) block comprising a PBCH that carries a master information block (MIB) including an SIB1 CORESET configuration, wherein the SIB1 CORESET configuration comprises a frequency location, a number of resource blocks (RBs) comprising an SIB1 CORESET associated with the SS/PBCH block, and information of time domain resources of the SIB1 CORESET, determining an initial active bandwidth part (BWP) comprising the frequency location, the number of RBs comprising the SIB1 CORESET, and a numerology of remaining minimum system information (RMSI), and receiving, from the BS, a physical downlink control channel (PDCCH) mapped to at least one time-frequency resource within the SIB1 CORESET, wherein the PDCCH includes scheduling information of a physical downlink shared channel (PDSCH) containing an SIB 1.

20150189197, Jul 2, 2015

Nov 11, 2014

14/538772

Li Guo - San Jose CA, US
Guangbin Zhang - Cupertino CA, US

CISTA SYSTEM CORP. - San Jose CA

H04N 5/345
H04N 5/374

The present invention provides a compact row decoder with multiple voltage support. The row decoder may include a global driver and a plurality of row-level drivers. The global driver may include one or more voltage level shifters that are operable to provide multiple voltages required to drive each of the plurality of row-level drivers. The plurality of row-level drivers each may include only one voltage level shifter. In an example, the row-level driver includes an address decoder implemented in a digital domain providing an address selection signal, a voltage level shifter to convert the address selection signal to an analog domain, and a tow driver receiving driving signals from the global driver. The row driver has no voltage level shifter contained therein. Thus, the row-level drivers and the row decoder may be very compact. The present invention further provides a CMOS image sensor including the row decoder and a method of operating the CMOS image sensor.

20150171749, Jun 18, 2015

Nov 9, 2014

14/536632

Li Guo - San Jose CA, US
Guangbin Zhang - Cupertino CA, US

CISTA SYSTEM CORP. - San Jose CA

H02M 3/158
H02M 3/07
H02M 1/08

The invention provides a voltage regulator with multiple output ranges. The voltage regulator includes a voltage divider that has at least a first resistor and a second resistor. The resistance ratio of the first resistor to the second resistor is 1:(X−1). The input of the regulator is connected to the first resistor, and the output is connected to the second resistor. A voltage source may provide a reference voltage Vref to a connecting point between the first resistor and the second resistor. At least one working circuit is connected to the output to provide the output voltage as Vout=Vin−X(Vin−Vref), wherein Vin is the input voltage. As another option, the at least one working circuit may be deactivated and the output may be coupled to ground.