US Patent:
20160301428, Oct 13, 2016
Inventors:
- Armonk NY, US
Chen-Yong Cher - Port Chester NY, US
Yoonho Park - Chappaqua NY, US
Bryan S. Rosenburg - Cortlandt Manor NY, US
Kyung D. Ryu - New City NY, US
International Classification:
H03M 13/35
G06F 11/10
Abstract:
A method for providing selective memory error protection responsive to a predictable failure notification associated with at least one portion of a memory in a computing system includes: obtaining an active error correcting code (ECC) configuration corresponding to the portion of the memory; determining whether the active ECC configuration is sufficient to correct at least one error in the portion of the memory affected by the predictable failure notification; when the active ECC configuration is insufficient to correct the error, determining whether data corruption can be tolerated by an application running on the computing system; when data corruption cannot be tolerated by the application, determining whether a stronger ECC level is available and, if a stronger ECC level is available, increasing a strength of the active ECC configuration; and when data corruption can be tolerated, performing page reassignment and aggregation of non-critical data.