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Raymond V Kong

from Milpitas, CA
Age ~81
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Also known as:
Raymond Kun Kong, Raymond K Kong, Kun Vai Kong, Kun V Kong, Raymond K Ong
Related to:
Sonny K Chan, 78Teresa P Pang, 59Steven Waiyip Kong, 49Joyce M Kong, 48Anna P Kwan, 65Pui Y Kong, 80Anna S Pang, 48
Connected to:
Agus P Kong, 51Alysse Kong, 38Angela H Kong, 53April Kong, 84Betty L Kong, 98Bonnie L Kong, 78Caleb J Kong, 35Calvin F Kong, 80Chi I Kong, 51Chris Kong, 34

Raymond Kong Phones & Addresses

  • Milpitas, CA
  • Mendota, CA
  • Dinuba, CA
  • San Jose, CA

Resumes

Resumes

Raymond Kong Photo 1

Partner At Fisher & Kong Llp

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Position:
Partner at Fisher & Kong LLP
Location:
Oakland, California
Industry:
Law Practice
Work:
Fisher & Kong LLP - Oakland, California since Jan 2012
Partner
Kilpatrick Townsend & Stockton LLP Oct 2010 - May 2011
Counsel
Bell, Rosenberg & Hughes LLP Feb 2002 - Sep 2010
Partner
US Securities and Exchange Commission Jun 2001 - Aug 2001
Summer legal clerk
UC Hastings College of the Law 2000 - 2001
Research assistant
Education:
University of California, Hastings College of the Law 1999 - 2002
J.D., Law Brown University 1995 - 1999
B.A., Political Science, Philosophy Kamehameha Schools 1991 - 1995
High School
Raymond Kong Photo 2

Chief Financial Officer At New Dawn Memory Care

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Position:
Chief Financial Officer at New Dawn Memory Care
Location:
Scottsdale, Arizona
Industry:
Hospital & Health Care
Work:
New Dawn Memory Care - Scottsdale, Arizona since May 2013
Chief Financial Officer
River Polymers Group - New York, New York Mar 2006 - Apr 2013
Chief Financial Officer and Senior Business Development Officer
Goldman Sachs - Greater New York City Area Feb 1997 - Mar 2006
Vice President
Goldman Sachs - Hong Kong Aug 1993 - Jan 1997
Vice President
Coopers & Lybrand - Greater New York City Area Sep 1990 - Aug 1992
Senior Associate - Financial Services
Education:
University of Pennsylvania - The Wharton School 1986 - 1990
Bachelor of Science, Economics
Languages:
Chinese
Raymond Kong Photo 3

Raymond Kong

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Location:
United States

Business Records

Name / Title
Company / Classification
Phones & Addresses
Raymond Kong
President
Rwk Associates, Inc
Raymond Kong
President
ALLIANCE PHARMACY CONSULTING, INC
Raymond Kong
President
California Earth Minerals, Corp
Raymond Kong
Principal
Alliance Pharamacy Consultants
Services-Misc
28730 Barn Rock Dr, Hayward, CA 94542
Raymond L. Kong
Director, Principal
Snp Pharmacy
Ret Drugs/Sundries
21150 Cabot Blvd, Hayward, CA 94545
(510) 940-1300
Raymond Kong
Manager
Sky Glory International Inc
Raymond Kong
Secretary
River Trading International Co., Inc
Raymond Y. Kong
President
Belden Place, Inc

Publications

Us Patents

Method And System For Implementing A Circuit Design In A Tree Representation

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US Patent:
7146583, Dec 5, 2006
Filed:
Aug 6, 2004
Appl. No.:
10/912999
Inventors:
Richard Yachyang Sun - Mountain View CA, US
Daniel J. Downs - Longmont CO, US
Raymond Kong - San Francisco CA, US
John J. Laurence - Westminster CO, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
716 3, 716 16
Abstract:
A method of implementing a user integrated circuit (IC) design in a tree representation includes the step of introducing the tree representation for the user IC design in a partitioned manner including at least one sub-design to form a design abstraction of the user design. At least one sub-design can include a sub-design providing for multiple levels of implementation hierarchy. The method can further include the step of traversing the design abstraction in a top-down fashion to provide functions selected among floor planning, port assignment, and timing budgeting for at least one sub-design, and the step of traversing the design abstraction in a bottom-up fashion to facilitate at least one among resolution of resource conflicts and parallel processing of multiple sub-designs. Traversing the design abstraction in the bottom-up fashion can facilitate a re-budgeting of timing for the integrated circuit design.

Incremental Placement And Routing

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US Patent:
8196083, Jun 5, 2012
Filed:
Dec 9, 2010
Appl. No.:
12/964126
Inventors:
Raymond Kong - San Jose CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 9/455
G06F 17/50
US Classification:
716126, 716113, 716129, 716130
Abstract:
In one embodiment, a method is provided for incremental routing of a circuit design having modified and unmodified signals. Critical routed signals of the partially routed circuit design are determined. For each critical routed signal, a first set of routing constraints is applied to prevent rerouting of the signal. The partially routed circuit design is routed according to the first set of routing constraints to produce a non-conflicting routing solution. In response to the non-conflicting routing solution not meeting timing requirements, the first set of routing constraints is removed and post-routing optimization processes are performed on the non-conflicting routing solution to reduce propagation delay of one or more signals.

System And Method For Automated Configuration Of Design Constraints

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US Patent:
8549454, Oct 1, 2013
Filed:
Jul 20, 2012
Appl. No.:
13/554418
Inventors:
Raymond Kong - San Jose CA, US
David A. Knol - Morgan Hill CA, US
Frederic Revenu - San Carlos CA, US
Dinesh K. Monga - Santa Clara CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
716117, 716110, 716116, 716111, 716122
Abstract:
In one embodiment, a method for propagating design constraints between a module and a module instance in a circuit design is provided. A port of the module and a port/pin of the circuit design are determined, between which constraints are to be propagated. The determination of the port/pin includes determining whether or not pin of the module instance corresponding to the port is directly connected to a top-level port of the circuit design. In response to determining that the pin is directly connected to a top-level port, the top-level port is selected as the port/pin. In response to determining that the pin is not directly connected to the top-level port, the pin is selected as the port/pin. Design constraints are propagated between the port and the selected port/pin. The propagated design constraints are stored in a storage device.

Partial Reconfiguration For Network-On-Chip (Noc)

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US Patent:
20200092230, Mar 19, 2020
Filed:
Sep 17, 2018
Appl. No.:
16/133357
Inventors:
- San Jose CA, US
Ian A. Swarbrick - Santa Clara CA, US
Jun Liu - San Jose CA, US
Raymond Kong - San Jose CA, US
Herve Alexanian - San Jose CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H04L 12/931
G06F 15/78
H04L 12/933
Abstract:
Examples described herein provide for an electronic circuit, such as a System-on-Chip (SoC), having a Network-on-Chip (NoC). The NoC is configurable and has capabilities to be partially reconfigured. In an example, a NoC on an integrated circuit is configured. Subsystems on the integrated circuit communicate via the NoC. The NoC is partially reconfigured. A first subset of the NoC is reconfigured during the partial reconfiguration, and a second subset of the NoC is capable of continuing to pass communications uninterruptedly during the partial reconfiguration. After the partial reconfiguration, two or more of the subsystems communicate via the first subset of the NoC.

Hierarchical Partial Reconfiguration For Programmable Integrated Circuits

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US Patent:
20200028511, Jan 23, 2020
Filed:
Jul 20, 2018
Appl. No.:
16/041602
Inventors:
- San Jose CA, US
Raymond Kong - San Jose CA, US
Brian S. Martin - Longmont CO, US
Jun Liu - San Jose CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H03K 19/177
G06F 17/50
Abstract:
Hierarchical partial reconfiguration for integrated circuits includes converting, using computer hardware, a first partial reconfiguration module of a circuit design into a first partial reconfiguration container, wherein the circuit design is placed and routed, loading, using the computer hardware, a first netlist into the first partial reconfiguration container, wherein the first netlist includes a first plurality of partial reconfiguration modules that are initially empty, and including, using the computer hardware, a further netlist within each of the first plurality of partial reconfiguration modules. Using the computer hardware, the first partial reconfiguration container is implemented with the first plurality of partial reconfiguration modules being implemented within the first partial reconfiguration container.
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Raymond V Kong from Milpitas, CA, age ~81 Get Report