Search

Sahithi Krishna Phones & Addresses

  • Northville, MI
  • Plano, TX
  • Richardson, TX
  • Westmont, IL
  • Chicago, IL
  • Willowbrook, IL

Publications

Us Patents

Streaming Address Generation

View page
US Patent:
20210157585, May 27, 2021
Filed:
Feb 1, 2021
Appl. No.:
17/164448
Inventors:
- Dallas TX, US
Duc Quang BUI - Grand Prairie TX, US
Joseph ZBICIAK - San Jose CA, US
Sahithi KRISHNA - Plano TX, US
Soujanya NARNUR - Austin TX, US
International Classification:
G06F 9/30
G06F 12/0811
Abstract:
A digital signal processor having at least one streaming address generator, each with dedicated hardware, for generating addresses for writing multi-dimensional streaming data that comprises a plurality of elements. Each at least one streaming address generator is configured to generate a plurality of offsets to address the streaming data, and each of the plurality of offsets corresponds to a respective one of the plurality of elements. The address of each of the plurality of elements is the respective one of the plurality of offsets combined with a base address.

Look Up Table With Data Element Promotion

View page
US Patent:
20200394038, Dec 17, 2020
Filed:
Aug 31, 2020
Appl. No.:
17/008456
Inventors:
- Dallas TX, US
Dheera BALASUBRAMANIAN - Richardson TX, US
Naveen BHORIA - Plano TX, US
Sahithi KRISHNA - Plano TX, US
International Classification:
G06F 9/30
G06F 16/901
Abstract:
Disclosed embodiments relate to look up table operations implemented in a digital data processor. A look up table read instruction recalls data elements of a specified data size from table(s) and stores recalled data elements in successive slots in a destination register. Disclosed embodiments promote data elements to a larger size with selected sign or zero extension. A source operand register stores vector offsets from a table start address. A destination operand stores the results of the look up table read. The look up table instruction implies a base address register and a configuration register. The base address register stores a table base address. The configuration register sets various look up table read operation parameters.

System And Method For Predication Handling

View page
US Patent:
20200371711, Nov 26, 2020
Filed:
May 24, 2019
Appl. No.:
16/422250
Inventors:
- Dallas TX, US
Duc Quang BUI - Grand Prairie TX, US
Joseph ZBICIAK - San Jose CA, US
Sahithi KRISHNA - Plano TX, US
Soujanya NARNUR - Austin TX, US
Alan DAVIS - Sugar Land TX, US
International Classification:
G06F 3/06
G06F 9/30
Abstract:
A method for writing data to memory that provides for generation of a predicate to disable a portion of the elements so that only the enabled elements are written to memory. Such a method may be employed to write multi-dimensional data to memory and/or may be used with a streaming address generator.

Streaming Address Generation

View page
US Patent:
20200371789, Nov 26, 2020
Filed:
May 24, 2019
Appl. No.:
16/422324
Inventors:
- Dallas TX, US
Duc Quang BUI - Grand Prairie TX, US
Joseph ZBICIAK - San Jose CA, US
Sahithi KRISHNA - Plano TX, US
Soujanya NARNUR - Austin TX, US
International Classification:
G06F 9/30
G06F 12/0811
Abstract:
A digital signal processor having at least one streaming address generator, each with dedicated hardware, for generating addresses for writing multi-dimensional streaming data that comprises a plurality of elements. Each at least one streaming address generator is configured to generate a plurality of offsets to address the streaming data, and each of the plurality of offsets corresponds to a respective one of the plurality of elements. The address of each of the plurality of elements is the respective one of the plurality of offsets combined with a base address.

Look Up Table With Data Element Promotion

View page
US Patent:
20190205132, Jul 4, 2019
Filed:
Mar 29, 2018
Appl. No.:
15/940283
Inventors:
- Dallas TX, US
Dheera BALASUBRAMANIAN - Richardson TX, US
Naveen BHORIA - Plano TX, US
Sahithi KRISHNA - Plano TX, US
International Classification:
G06F 9/30
G06F 17/30
Abstract:
Disclosed embodiments relate to look up table operations implemented in a digital data processor. A look up table read instruction recalls data elements of a specified data size from table(s) and stores recalled data elements in successive slots in a destination register. Disclosed embodiments promote data elements to a larger size with selected sign or zero extension. A source operand register stores vector offsets from a table start address. A destination operand stores the results of the look up table read. The look up table instruction implies a base address register and a configuration register. The base address register stores a table base address. The configuration register sets various look up table read operation parameters.
Sahithi N Krishna from Northville, MI, age ~44 Get Report