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Kinkee Sit

from Mountain View, CA
Age ~51
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Also known as:
Kin Kee Sit, Kin Yip Sit, Kin K Sit, Kin Kee Sitkin, Kin-Kee Sit, Kee Sit, Kin-Yip Sit, King Sit, Kinkee Seit
Related to:
Kin-Kee Living SitKin Sit, 49Kin Sit
Connected to:
Allen C Sit, 36Benson B Sit, 47Danny Sit, 35Jasmine Sit, 33Kin G Sit, 77Melissa R Sit, 54Mui E Sit, 53Nelson Sit, 52Olivia Y Sit, 82Peter Sit, 70

Kinkee Sit Phones & Addresses

  • Mountain View, CA
  • Sunnyvale, CA
  • Palo Alto, CA
  • Cupertino, CA
  • Madison, WI

Publications

Us Patents

Method And Apparatus For Improving Dispersal Performance In A Processor Through The Use Of No-Op Ports

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US Patent:
7149881, Dec 12, 2006
Filed:
Mar 19, 2004
Appl. No.:
10/804865
Inventors:
Sailesh Kottapalli - Milpitas CA, US
Udo Walterscheidt - San Jose CA, US
Andrew Sun - Santa Clara CA, US
Thomas Yeh - Cupertino CA, US
Kinkee Sit - Sunnyvale CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 9/38
US Classification:
712215
Abstract:
A method and apparatus for improving dispersal performance of instruction threads is described. In one embodiment, the dispersal logic determines whether the instructions supplied to it include any NOP instructions. When a NOP instruction is detected, the dispersal logic places the NOP into a no-op port for execution. All other instructions are distributed to the proper execution pipes in a normal manner. Because the NOP instructions do not use the execution resources of other instructions, all instruction threads can be executed in one cycle.

Method And Apparatus For Improving Dispersal Performance In A Processor Through The Use Of No-Op Ports

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US Patent:
20020087835, Jul 4, 2002
Filed:
Dec 29, 2000
Appl. No.:
09/753060
Inventors:
Sailesh Kottapalli - Milpitas CA, US
Udo Walterscheidt - San Jose CA, US
Andrew Sun - Santa Clara CA, US
Thomas Yeh - Cupertino CA, US
Kinkee Sit - Sunnyvale CA, US
International Classification:
G06F009/30
US Classification:
712/215000
Abstract:
A method and apparatus for improving dispersal performance of instruction threads is described. In one embodiment, the dispersal logic determines whether the instructions supplied to it include any NOP instructions. When a NOP instruction is detected, the dispersal logic places the NOP into a no-op port for execution. All other instructions are distributed to the proper execution pipes in a normal manner. Because the NOP instructions do not use the execution resources of other instructions, all instruction threads can be executed in one cycle.
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Kinkee Sit from Mountain View, CA, age ~51 Get Report