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Khasim S Dudekula

from Scarsdale, NY
Age ~52
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Also known as:
Khasim S Robakis, Khasim Khasim, Dudekula S Khasim, M Dudekula
Related to:
Rasool B DudekulaMumtaz H Vauhkonen, 49Hussain B A, 49Ari Vauhkonen
Connected to:
Tina B Dudelson, 65David P Dudemaine, 44Peter A Duden, 33Quenten E Duden, 55Mark P Dudenake, 60Jac S Dudenhefer, 72Angela J Dudenhoeffer, 59Linda L Dudenhoeffer, 60Troy Dudenhoefer, 57Luba Dudenko, 31

Khasim Dudekula Phones & Addresses

  • Scarsdale, NY
  • 50 Woods Ln, Los Altos, CA 94024
  • Mountain View, CA
  • 551 Grand Fir Ave, Sunnyvale, CA 94086 (408) 736-8906
  • 551 Grand Fir Ave #3, Sunnyvale, CA 94086 (408) 736-8906
  • Rancho Cordova, CA
  • Santa Clara, CA
  • Folsom, CA
  • Potsdam, NY

Work

Company: Intel corporation May 1997 Position: Staff systems engineer

Education

Degree: Master of Science, Masters School / High School: Clarkson University 1995 to 1997 Specialities: Electrical Engineering

Skills

Soc • Processors • Debugging • Verilog • Asic • Firmware • Embedded Systems • Microarchitecture • Ic • Rtl Design • C++ • Perl • Matlab • Application Specific Integrated Circuits • System on A Chip • Unix • Linux • Device Drivers • Systemc • Windows • Pcie • Shell Scripting • Spice • Artificial Neural Networks • Oop • Oo Software Development • Tcsh • Machine Learning • Python • Software • Integrated Circuits • System Architecture • Ia64 • X86 Assembly • Ixp • Clips • Fortran • Flex • Lex • Bison • Yacc • Microsoft Visual Studio C++ • Pvm • Moca • Semiconductors • Algorithms • Microprocessors • Tensorflow • Pytorch

Languages

English

Industries

Internet

Resumes

Resumes

Khasim Dudekula Photo 1

Engineer

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Location:
50 Woods Ln, Los Altos, CA 94024
Industry:
Internet
Work:
Intel Corporation since May 1997
Staff Systems Engineer
Synopsys Jun 1996 - Aug 1996
Summer Internship
Education:
Clarkson University 1995 - 1997
Master of Science, Masters, Electrical Engineering Indian Statistical Institute, Kolkata 1995 - 1995
Jawaharlal Nehru Technological University 1991 - 1995
Bachelors, Bachelor of Technology, Communication, Engineering, Electronics
Skills:
Soc
Processors
Debugging
Verilog
Asic
Firmware
Embedded Systems
Microarchitecture
Ic
Rtl Design
C++
Perl
Matlab
Application Specific Integrated Circuits
System on A Chip
Unix
Linux
Device Drivers
Systemc
Windows
Pcie
Shell Scripting
Spice
Artificial Neural Networks
Oop
Oo Software Development
Tcsh
Machine Learning
Python
Software
Integrated Circuits
System Architecture
Ia64
X86 Assembly
Ixp
Clips
Fortran
Flex
Lex
Bison
Yacc
Microsoft Visual Studio C++
Pvm
Moca
Semiconductors
Algorithms
Microprocessors
Tensorflow
Pytorch
Languages:
English

Publications

Us Patents

Method And Apparatus For Adaptively Reducing Artifacts In Block-Coded Video

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US Patent:
20060251174, Nov 9, 2006
Filed:
May 9, 2005
Appl. No.:
11/125948
Inventors:
Jorge Caviedes - Mesa AZ, US
Mehesh Subedar - Tempe AZ, US
Khasim Dudekula - Sunnyvale CA, US
International Classification:
H04N 11/04
US Classification:
375240240
Abstract:
Apparatus, systems and methods for adaptively reducing blocking artifacts in block-coded video are disclosed. In one implementation, a system includes processing logic at least capable of deblock filtering at least a portion of a line of video data based, at least in part, on edge information and texture information to generate at least a portion of a line of deblocked video data, and an image data output device responsive to the processing logic.

Method And Apparatus For Adaptively Reducing Artifacts In Block-Coded Video

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US Patent:
20140050268, Feb 20, 2014
Filed:
Aug 6, 2013
Appl. No.:
13/960325
Inventors:
Jorge E. Caviedes - Mesa AZ, US
Mahesh M. Subedar - Tempe AZ, US
Khasim S. Dudekula - Sunnyvale CA, US
International Classification:
H04N 7/26
US Classification:
37524024
Abstract:
Apparatus, systems and methods for adaptively reducing blocking artifacts in block-coded video are disclosed. In one implementation, a system includes processing logic at least capable of deblock filtering at least a portion of a line of video data based, at least in part, on edge information and texture information to generate at least a portion of a line of deblocked video data, and an image data output device responsive to the processing logic.

Method And Apparatus For Adaptively Reducing Artifacts In Block-Coded Video

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US Patent:
20210014538, Jan 14, 2021
Filed:
Sep 29, 2020
Appl. No.:
17/037279
Inventors:
- Santa Clara CA, US
Mahesh M. Subedar - Laveen AZ, US
Khasim S. Dudekula - Sunnyvale CA, US
Assignee:
INTEL CORPORATION - SANTA CLARA CA
International Classification:
H04N 19/80
H04N 19/117
H04N 19/86
H04N 19/136
H04N 19/44
H04N 19/176
H04N 19/14
Abstract:
Apparatus, systems and methods for adaptively reducing blocking artifacts in block-coded video are disclosed. In one implementation, a system includes processing logic at least capable of deblock filtering at least a portion of a line of video data based, at least in part, on edge information and texture information to generate at least a portion of a line of deblocked video data, and an image data output device responsive to the processing logic.

Method And Apparatus For Adaptively Reducing Artifacts In Block-Coded Video

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US Patent:
20200107046, Apr 2, 2020
Filed:
Oct 4, 2019
Appl. No.:
16/593710
Inventors:
- SANTA CLARA CA, US
Mahesh M. Subedar - Laveen AZ, US
Khasim S. Dudekula - Sunnyvale CA, US
Assignee:
INTEL CORPORATION - SANTA CLARA CA
International Classification:
H04N 19/80
H04N 19/14
H04N 19/176
H04N 19/44
H04N 19/136
H04N 19/86
H04N 19/117
Abstract:
Apparatus, systems and methods for adaptively reducing blocking artifacts in block-coded video are disclosed. In one implementation, a system includes processing logic at least capable of deblock filtering at least a portion of a line of video data based, at least in part, on edge information and texture information to generate at least a portion of a line of deblocked video data, and an image data output device responsive to the processing logic.

Method And Apparatus For Adaptively Reducing Artifacts In Block-Coded Video

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US Patent:
20170013282, Jan 12, 2017
Filed:
Sep 20, 2016
Appl. No.:
15/271152
Inventors:
- Santa Clara CA, US
Mahesh M. Subedar - Laveen AZ, US
Khasim S. Dudekula - Sunnyvale CA, US
International Classification:
H04N 19/86
H04N 19/14
H04N 19/117
Abstract:
Apparatus, systems and methods for adaptively reducing blocking artifacts in block-coded video are disclosed. In one implementation, a system includes processing logic at least capable of deblock filtering at least a portion of a line of video data based, at least in part, on edge information and texture information to generate at least a portion of a line of deblocked video data, and an image data output device responsive to the processing logic.
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Khasim S Dudekula from Scarsdale, NY, age ~52 Get Report