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Kevin C Chea

from San Francisco, CA
Age ~51
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Also known as:
Kevin L Chea, Kevin C Chey, Kim Chea, Mary Chea
Phone and address:
701 Minnesota St, San Francisco, CA 94107
Related to:
Mary P Chea, 78Melvin T Lee, 51Ramon C Chea, 82R Chea, 82Terence C Chea, 49
Connected to:
Adam Chea, 41Allison Chea, 41Alvin Chea, 40Anthony Chea, 30Chandy Chea, 44Chanthan S Chea, 71Chok C Chea, 44David Chea, 54Deanna S Chea, 37Eileen M Chea, 68

Kevin Chea Phones & Addresses

  • 701 Minnesota St, San Francisco, CA 94107
  • 160 Brannan St, San Francisco, CA 94107
  • 6484 Deer Hollow Ct, San Jose, CA 95120
  • Seattle, WA
  • Santa Barbara, CA
  • Atlanta, GA
  • Los Gatos, CA
  • 6484 Deer Hollow Dr, San Jose, CA 95120

Resumes

Resumes

Kevin Chea Photo 1

Software Engineer

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Location:
260 King St, San Francisco, CA 94107
Industry:
Internet
Work:
Square
Software Engineer
Zirx Oct 2014 - Aug 2017
Lead Software Engineer
Opentv Aug 2010 - Sep 2014
Senior Software Engineer, Advanced Advertising
Stretch Inc. Mar 2008 - Jul 2010
Member of Technical Staff
Education:
Carnegie Mellon University
Bachelors, Bachelor of Science, Mathematics, Computer Engineering, Computer Science
Skills:
Embedded Systems
Device Drivers
Rtos
Firmware
Web Services
Software Development
Embedded Software
C
Java
Debugging
Sql
Mobile Devices
Linux
Arm
Servlets
Virtualization
Linux Development
Tcp/Ip
Internet Protocol Suite
Digital Tv
Digital Video
Linux Kernel
Jboss Application Server
Ejb
Jpa
Real Time Operating Systems
Html
Objective C
Ios Development
Swift
Android Development
Vxworks
Assembly
Nucleus
Kevin Chea Photo 2

Kevin Chea

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Kevin Chea Photo 3

Kevin Chea

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Publications

Us Patents

Abstraction Of Configurable Processor Functionality For Operating Systems Portability

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US Patent:
6763327, Jul 13, 2004
Filed:
Feb 17, 2000
Appl. No.:
09/506433
Inventors:
Christopher Mark Songer - Mountain View CA
Pavlos Konas - Mountain View CA
Marc E. Gauthier - Sunnyvale CA
Kevin C. Chea - San Francisco CA
Assignee:
Tensilica, Inc. - Santa Clara CA
International Classification:
G06F 1750
US Classification:
703 21, 703 23, 703 20, 703 22, 703 27, 717107, 717138, 717151, 717163, 709 1, 709324, 709319, 709321, 709328, 709310, 716 1, 716 18, 716 2, 716 17
Abstract:
A hardware abstraction layer operates as a system architectural layer between a real-time operating system and an underlying configurable processor. The hardware abstraction layer provides an abstraction of processor-specific functionality to the operating system. In particular, it abstracts configurable processor features visible to the operating system to provide a uniform, standardized interface between the operating system and the configurable processor on which it runs. Thus, an operating system running on top of the hardware abstraction layer will work on all configurations of the processor which differ from one another only in the configuration parameters covered by the hardware abstraction layer. The hardware abstraction layer may be generated using the same information that is used to describe the features being configured in the configurable processor. Automatic generation of the HAL greatly eases use of the HAL and the configurable processor, since the user is not required to manually write the HAL or adapt an existing one based on the processor configuration parameters.
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Kevin C Chea from San Francisco, CA, age ~51 Get Report