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Kangho Lee

from San Diego, CA
Age ~48
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Also known as:
Ho Lee Kang, Lee Kangho
Related to:
Yeunjae Lee, 35Taylor Bagsby, 22
Connected to:
Aarron Lee, 39Ada P Lee, 66Adam Y Lee, 63Adrienna V Lee, 57Aekyung P Lee, 66Aeron C Lee, 48Ahmed F Lee, 57Ahran Lee, 38Ahrom A Lee, 37Aiesha M Lee, 40

Kangho Lee Phones & Addresses

  • San Diego, CA
  • 333 Ravenwood Ct, Lafayette, IN 47909 (765) 474-2430
  • West Lafayette, IN
  • Hillsboro, OR
  • W Lafayette, IN

Resumes

Resumes

Kangho Lee Photo 1

Kangho Lee

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Kangho Lee Photo 2

Kangho Lee

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Kangho Lee Photo 3

Stt-Mram Device Engineer

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Position:
Staff Engineer at Qualcomm
Location:
San Diego, California
Industry:
Writing and Editing
Work:
Qualcomm - San Diego, CA since Jan 2008
Staff Engineer
Intel - Hillsboro, OR May 2007 - Aug 2007
Intern device engineer
MbyN Jan 2000 - Feb 2003
Multimedia software engineer
Education:
Purdue University 2003 - 2007
Ph. D., Electrical and Computer Engineering Seoul National University 1996 - 2000
B. S., Electrical Engineering
Languages:
Korean
English

Business Records

Name / Title
Company / Classification
Phones & Addresses
Kangho Lee
Managing
Life'n Stats
Custom Computer Programing · A Maker of Low Energy Wireless Accessori
11515 Caminito Ln Bar, San Diego, CA 92126
11515 Cminito Lar Bar 8, San Diego, CA 92126

Publications

Us Patents

Magnetic Tunnel Junction And Method Of Fabrication

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US Patent:
7829923, Nov 9, 2010
Filed:
Oct 23, 2008
Appl. No.:
12/256487
Inventors:
Xia Li - San Diego CA, US
Seung H. Kang - San Diego CA, US
Xiaochun Zhu - San Diego CA, US
Kangho Lee - San Diego CA, US
Matthew Nowak - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego
International Classification:
H01L 27/108
US Classification:
257295, 257E29272, 257E29104
Abstract:
In a particular embodiment, a method of forming a magnetic tunnel junction (MTJ) device includes applying a dielectric layer to a surface, applying a metal layer to the dielectric layer, and adding a cap layer on the dielectric layer. The method also includes forming a magnetic tunnel junction (MTJ) stack such that an electrode of the MTJ stack is disposed on the metal layer and the cap layer contacts a side portion of the metal layer. An adjustable depth to via may connect a top electrode of the MTJ stack to a top metal.

Spin Transfer Torque—Magnetic Tunnel Junction Device And Method Of Operation

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US Patent:
7969767, Jun 28, 2011
Filed:
May 29, 2009
Appl. No.:
12/474608
Inventors:
Xia Li - San Diego CA, US
Kangho Lee - San Diego CA, US
Xiaochun Zhu - San Diego CA, US
Seung H. Kang - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
G11C 11/00
G11C 11/14
G11C 11/15
US Classification:
365158, 365171, 365173
Abstract:
A method is disclosed that includes controlling current flow direction for current sent over a source line or a bit line of a magnetic memory device. A current generated magnetic field assists switching of a direction of a magnetic field of a free layer of a magnetic element within a spin transfer torque magnetic tunnel junction (STT-MTJ) device.

Magnetic Tunnel Junction Device And Fabrication

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US Patent:
8120126, Feb 21, 2012
Filed:
Mar 2, 2009
Appl. No.:
12/396359
Inventors:
Kangho Lee - San Diego CA, US
Xiaochun Zhu - San Diego CA, US
Xia Li - San Diego CA, US
Seung H. Kang - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
H01L 29/82
G11C 11/02
US Classification:
257421, 257414, 257422, 257427, 257E29323, 438 3, 360313, 3603242, 365157, 365171
Abstract:
A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, the method includes depositing a capping material on a free layer of a magnetic tunneling junction structure to form the capping layer and oxidizing a portion of the capping material to form a layer of oxidized material.

Magnetic Tunnel Junction Device And Fabrication

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US Patent:
8238143, Aug 7, 2012
Filed:
Dec 15, 2009
Appl. No.:
12/638460
Inventors:
Kangho Lee - San Diego CA, US
Xiaochun Zhu - San Diego CA, US
Xia Li - San Diego CA, US
Seung H. Kang - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
G11C 11/00
US Classification:
365158, 365173, 365171, 365 97, 365 50
Abstract:
A magnetic tunneling junction (MTJ) device and fabrication method is disclosed. In a particular embodiment, an apparatus is disclosed that includes an MTJ device. The MTJ device includes a barrier layer, a free layer, and a magnesium (Mg) capping layer. The free layer is positioned between the barrier layer and the magnesium (Mg) capping layer.

Magnetoresistive Random Access Memory (Mram) With Integrated Magnetic Film Enhanced Circuit Elements

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US Patent:
8248840, Aug 21, 2012
Filed:
Mar 26, 2010
Appl. No.:
12/732531
Inventors:
Xia Li - San Diego CA, US
Seung H. Kang - San Diego CA, US
Xiaochun Zhu - San Diego CA, US
Kangho Lee - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
G11C 11/00
US Classification:
365158, 365171, 365209, 3652255, 3652435
Abstract:
A Magnetoresistive Random Access Memory (MRAM) integrated circuit includes a substrate, a magnetic tunnel junction region, a magnetic circuit element, and an integrated magnetic material. The magnetic tunnel junction region is disposed on the substrate, and includes a first magnetic layer and a second magnetic layer separated by a tunnel barrier insulating layer. The magnetic circuit element region is disposed on the substrate, and includes a plurality of interconnected metal portions. The integrated magnetic material is disposed on the substrate adjacent to the plurality of interconnected metal portions.

Programmable Write Driver For Stt-Mram

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US Patent:
8320167, Nov 27, 2012
Filed:
Jul 16, 2010
Appl. No.:
12/837779
Inventors:
Hari M. Rao - San Diego CA, US
Jung Pill Kim - San Diego CA, US
Kangho Lee - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
G11C 11/00
US Classification:
365158, 36518916, 36523006
Abstract:
A non-volatile memory structure comprises programmable write drivers for controlling drive strengths of write operations to storage elements. The memory structure comprises a storage element coupled to a bit line, a switching element coupled to the storage element, a source line and a word line, wherein the switching element is configured to change a logic state of the storage element. A first and a second write driver with programmable drive strengths are coupled to the bit line and source line respectively to enable control of drive strengths of write operations to the storage element.

Magnetic Random Access Memory (Mram) Layout With Uniform Pattern

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US Patent:
8441850, May 14, 2013
Filed:
Oct 8, 2010
Appl. No.:
12/901074
Inventors:
Kangho Lee - San Diego CA, US
Tae Hyun Kim - San Diego CA, US
Xia Li - San Diego CA, US
Jung Pill Kim - San Diego CA, US
Seung H. Kang - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
G11C 11/14
US Classification:
365171, 365 63, 3652101
Abstract:
A large scale memory array includes a uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects.

Write Energy Conservation In Memory

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US Patent:
8488363, Jul 16, 2013
Filed:
May 11, 2010
Appl. No.:
12/777468
Inventors:
Hari M. Rao - San Diego CA, US
Jung Pill Kim - San Diego CA, US
Taehyun Kim - San Diego CA, US
Xiaochun Zhu - San Diego CA, US
Kangho Lee - San Diego CA, US
Wuyang Hao - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
G11C 11/00
US Classification:
365148, 36518904, 3652331
Abstract:
A method writes data to a resistive memory, such as spin torque transfer magnetic random access memory (STT-MRAM). The method writes received bits of data to a memory cell array, in response to a first write signal. The method also reads stored data from the memory cell array, after the first write signal is generated, and then compares the stored data with the received bits of data to determine whether each of the received bits of data was written to the memory. In response to a second write signal, received bits of data determined not to have been written during the first write signal, are written.
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Kangho Lee from San Diego, CA, age ~48 Get Report