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Kallol Bera

from Fremont, CA
Age ~55
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Related to:
Sarmistha Bera
Connected to:
Arnab Bera, 42Edward Bera, 49Irene Bera, 105Jayati Bera, 58Monique Y Bera, 62Ranjan R Bera, 66Teresa M Bera, 60Carlos A Beracasa, 57Eli Beracha, 49Alejandro L Beracoechea, 50

Kallol Bera Phones & Addresses

  • 765 Gallegos Ter, Fremont, CA 94539
  • 3131 Neal Ave, San Jose, CA 95117
  • 1919 Fruitdale Ave, San Jose, CA 95128 (408) 289-1595
  • 2100 Fruitdale Ave, San Jose, CA 95128 (408) 289-1595
  • Philadelphia, PA
  • 1528 Vista Club Cir, Santa Clara, CA 95054
  • Alameda, CA
  • Secane, PA

Work

Company: Applied materials Dec 2010 Position: Sr. member of technical staff

Education

Degree: Ph. D. School / High School: Drexel University 1993 to 1999 Specialities: Mechanical Engineering

Skills

Characterization • Simulations • Plasma Physics • Semiconductors • Thin Films • Semiconductor Industry • Semiconductor Process • Design of Experiments • Metrology • Silicon • Cvd • R&D • Failure Analysis • Pvd • Engineering Management • Eda • Heat Transfer • Etching • Fluid Dynamics • Materials Science • Photovoltaics • Process Simulation • Photolithography • Cmos • Spc • Sensors • Process Integration • Jmp • Ic • Optics • Plasma Etch • Product Engineering • Physics • Nanotechnology • Mems • Sputtering • Robotics • Pecvd • Yield • Microelectronics • Solar Energy • Labview • Semiconductor Fabrication • Afm • Thermal • Scanning Electron Microscopy • Vacuum • Analog • Lithography • Finite Element Analysis

Interests

Listening To Music • Artwork • Workouts • Sight Seeing • Computer Simulation • Photography • Hiking • Plasma Processing • Singing • Movies

Industries

Semiconductors

Resumes

Resumes

Kallol Bera Photo 1

Director, Physicist And Scientist Distinguished Member Of Technical Staff

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Location:
San Francisco, CA
Industry:
Semiconductors
Work:
Applied Materials since Dec 2010
Sr. Member of Technical Staff
Applied Materials Jul 2004 - Dec 2010
Member of Technical Staff
Applied Materials Feb 2002 - Jul 2004
Sr. Process Engineer
Applied Materials Feb 2000 - Feb 2002
Process Engineer
Education:
Drexel University 1993 - 1999
Ph. D., Mechanical Engineering Indian Institute of Science 1991 - 1993
M.E., Mechanical Engineering Jadavpur University 1987 - 1991
B.M.E., Mechanical Engineering
Skills:
Characterization
Simulations
Plasma Physics
Semiconductors
Thin Films
Semiconductor Industry
Semiconductor Process
Design of Experiments
Metrology
Silicon
Cvd
R&D
Failure Analysis
Pvd
Engineering Management
Eda
Heat Transfer
Etching
Fluid Dynamics
Materials Science
Photovoltaics
Process Simulation
Photolithography
Cmos
Spc
Sensors
Process Integration
Jmp
Ic
Optics
Plasma Etch
Product Engineering
Physics
Nanotechnology
Mems
Sputtering
Robotics
Pecvd
Yield
Microelectronics
Solar Energy
Labview
Semiconductor Fabrication
Afm
Thermal
Scanning Electron Microscopy
Vacuum
Analog
Lithography
Finite Element Analysis
Interests:
Listening To Music
Artwork
Workouts
Sight Seeing
Computer Simulation
Photography
Hiking
Plasma Processing
Singing
Movies

Publications

Us Patents

Plasma Etch Process Using Polymerizing Etch Gases Across A Wafer Surface And Additional Polymer Managing Or Controlling Gases In Independently Fed Gas Zones With Time And Spatial Modulation Of Gas Content

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US Patent:
7540971, Jun 2, 2009
Filed:
Apr 28, 2006
Appl. No.:
11/414015
Inventors:
Kallol Bera - San Jose CA, US
Xiaoye Zhao - Mountain View CA, US
Kenny L. Doan - San Jose CA, US
Ezra Robert Gold - Sunnyvale CA, US
Paul Lukas Brillhart - Pleasanton CA, US
Bruno Geoffrion - Sunnyvale CA, US
Bryan Pu - San Jose CA, US
Daniel J. Hoffman - Saratoga CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/00
C23F 1/00
US Classification:
216 67, 216 58, 216 59, 438706, 438710, 15634534
Abstract:
A plasma etch process etches high aspect ratio openings in a dielectric film on a workpiece in a reactor having a ceiling electrode overlying the workpiece and an electrostatic chuck supporting the workpiece. The process includes injecting a polymerizing etch process gas through an annular zone of gas injection orifices in the ceiling electrode, and evacuating gas from the reactor through a pumping annulus surrounding an edge of the workpiece. The high aspect ratio openings are etched in the dielectric film with etch species derived from the etch process gas while depositing a polymer derived from the etch process gas onto the workpiece, by generating a plasma in the reactor by applying VHF source power and/or HF and/or LF bias power to the electrodes at the ceiling and/or the electrostatic chuck. The process further includes slowing the deposition rate of the polymer, minimizing etch stop and/or increasing the etch rate in a region of the workpiece typically the center by injecting oxygen or nitrogen and/or high-fluorine containing gas through gas injection orifice in the corresponding region of the ceiling electrode, and adjusting the flow rate of the oxygen or nitrogen and/or high-fluorine containing gas through the gas injection orifice to minimize the difference between profiles and etch depths at the workpiece center and the workpiece periphery.

Plasma Etch Process With Separately Fed Carbon-Lean And Carbon-Rich Polymerizing Etch Gases In Independent Inner And Outer Gas Injection Zones

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US Patent:
7541292, Jun 2, 2009
Filed:
Apr 28, 2006
Appl. No.:
11/414027
Inventors:
Kallol Bera - San Jose CA, US
Xiaoye Zhao - Mountain View CA, US
Kenny L. Doan - San Jose CA, US
Ezra Robert Gold - Sunnyvale CA, US
Paul Lukas Brillhart - Pleasanton CA, US
Bruno Geoffrion - Sunnyvale CA, US
Bryan Pu - San Jose CA, US
Daniel J. Hoffman - Saratoga CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/461
US Classification:
438723, 438719, 438724, 438725, 438729, 438736, 216 37, 216 67, 216 89
Abstract:
A plasma etch process for etching high aspect ratio openings in a dielectric film on a workpiece is carried out in a reactor having a ceiling electrode overlying the workpiece and an electrostatic chuck supporting the workpiece. The process includes injecting a first polymerizing etch process gas through a radially inward one of plural concentric gas injection zones in the ceiling electrode and injecting a second polymerizing etch process gas through a radially outward one of the plural concentric gas injection zones in the ceiling electrode, the compositions of the first and second process gases having first and second carbon-to-fluorine ratios that differ from one another. The process further includes evacuating gas from the reactor through a pumping annulus surrounding an edge of the workpiece, and etching the high aspect ratio openings in the dielectric film with etch species derived from the etch process gas while depositing a polymer derived from the etch process gas onto the workpiece, by generating a plasma in the reactor.

Apparatus And Method To Confine Plasma And Reduce Flow Resistance In A Plasma Reactor

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US Patent:
7585384, Sep 8, 2009
Filed:
Aug 29, 2008
Appl. No.:
12/201156
Inventors:
Kallol Bera - San Jose CA, US
Yan Ye - Saratoga CA, US
James D. Carducci - Sunnyvale CA, US
Daniel J. Hoffman - Saratoga CA, US
Steven C. Shannon - San Mateo CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
C23C 1/00
H01L 21/306
C23C 16/00
US Classification:
15634533, 118715
Abstract:
An apparatus configured to confine a plasma within a processing region in a plasma processing chamber. In one embodiment, the apparatus includes a ring that has a baffle having a plurality of slots and a plurality of fingers. Each slot is configured to have a width less than the thickness of a plasma sheath contained in the processing region.

Method And Apparatus To Confine Plasma And To Enhance Flow Conductance

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US Patent:
7618516, Nov 17, 2009
Filed:
May 3, 2006
Appl. No.:
11/381399
Inventors:
Kallol Bera - San Jose CA, US
Daniel Hoffman - Saratoga CA, US
Yan Ye - Saratoga CA, US
Michael Kutney - Santa Clara CA, US
Douglas A. Buchberger - Livermore CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
C23C 16/00
C23F 1/00
H01L 21/306
US Classification:
15634543, 15634551, 15634552, 15634553, 15634554, 15634555, 156915, 118728, 118729, 118730
Abstract:
The embodiments of the present invention generally relate to annular ring used in a plasma processing chamber. In one embodiment, the annular ring includes an inner wall, an upper outer wall, a lower outer wall, a step defined between the upper and lower outer wall, a top surface and a bottom wall. The step is formed upward and outward from the lower outer wall and inward and downward from the upper outer wall. The annular ring may be fabricated from a conductive material, such as silicon carbide and aluminum.

Apparatus To Confine Plasma And To Enhance Flow Conductance

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US Patent:
7674353, Mar 9, 2010
Filed:
Sep 13, 2006
Appl. No.:
11/531479
Inventors:
Kallol Bera - San Jose CA, US
Daniel Hoffman - Saratoga CA, US
Yan Ye - Saratoga CA, US
Michael Kutney - Santa Clara CA, US
Douglas A. Buchberger - Livermore CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
C23C 16/00
C23F 1/00
H01L 21/306
US Classification:
15634543, 15634551, 15634552, 15634553, 15634554, 15634555, 156915, 118723 E, 118728, 118729, 118730
Abstract:
The embodiments of the present invention generally relate to a plasma reactor. In one embodiment, a plasma reactor includes a substrate support is disposed in a vacuum chamber body and coupled to bias power generator. An RF electrode is disposed above the substrate support and coupled to a very high frequency power generator. A conductive annular ring is disposed on the substrate support and has a lower outer wall, an upper outer wall and an inner wall. A step is extends upward and outward from a lower outer wall and inward and downward from the upper outer wall. The inner wall disposed opposite the upper and lower outer wall. In other embodiments, the annular ring may be fabricated from a conductive material, such as silicon carbide and aluminum.

Apparatus And Method To Confine Plasma And Reduce Flow Resistance In A Plasma

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US Patent:
7754997, Jul 13, 2010
Filed:
Oct 25, 2007
Appl. No.:
11/924086
Inventors:
Kallol Bera - San Jose CA, US
Yan Ye - Saratoga CA, US
James D. Carducci - Sunnyvale CA, US
Daniel J. Hoffman - Saratoga CA, US
Steven C. Shannon - San Mateo CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
B23K 9/00
US Classification:
21912159
Abstract:
An apparatus configured to confine a plasma within a processing region in a plasma processing chamber. In one embodiment, the apparatus includes a ring that has a baffle having a plurality of slots and a plurality of fingers. Each slot is configured to have a width less than the thickness of a plasma sheath contained in the processing region.

Methods And Apparatus For Controlling Characteristics Of A Plasma

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US Patent:
7777599, Aug 17, 2010
Filed:
Nov 2, 2007
Appl. No.:
11/934197
Inventors:
Steven C. Shannon - San Mateo CA, US
Daniel J. Hoffman - Saratoga CA, US
Matthew L. Miller - Fremont CA, US
Olga Regelman - Daly City CA, US
Kenneth S. Collins - San Jose CA, US
Kartik Ramaswamy - San Jose CA, US
Kallol Bera - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01P 7/06
H05B 31/26
US Classification:
333227, 333230, 333231, 31511121
Abstract:
Methods and apparatus for controlling characteristics of a plasma, such as the spatial distribution of RF power and plasma uniformity, are provided herein. In some embodiments, an apparatus for controlling characteristics of a plasma includes a resonator for use in conjunction with a plasma reactor, the resonator including a source resonator for receiving an RF signal having a first frequency; a return path resonator disposed substantially coaxially with, and at least partially within, the source resonator; and an outer conductor having the source resonator and the return path resonator disposed substantially coaxially with, and at least partially within, the outer conductor, the outer conductor for providing an RF ground connection.

Method Of Preventing Etch Profile Bending And Bowing In High Aspect Ratio Openings By Treating A Polymer Formed On The Opening Sidewalls

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US Patent:
7846846, Dec 7, 2010
Filed:
Sep 25, 2007
Appl. No.:
11/861032
Inventors:
Kallol Bera - San Jose CA, US
Kenny L. Doan - San Jose CA, US
Stephan Wege - Dresden, DE
Subhash Deshmukh - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/302
US Classification:
438706, 438714, 438724, 438725
Abstract:
High aspect ratio contact openings are etched while preventing bowing or bending of the etch profile by forming a highly conductive thin film on the side wall of each contact opening. The conductivity of the thin film on the side wall is enhanced by ion bombardment carried out periodically during the etch process.
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Kallol Bera from Fremont, CA, age ~55 Get Report