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Ka K Kwok

from Austin, TX
Age ~44

Ka Kwok Phones & Addresses

  • 3815 Guadalupe St, Austin, TX 78751 (512) 371-7878
  • 2810 Salado St, Austin, TX 78705 (512) 474-7405
  • San Francisco, CA

Work

Address: 982 Mission St, San Francisco, CA 94103 Specialities: Psychotherapist

Languages

English

Specialities

Counseling

Professional Records

Medicine Doctors

Ka Kwok Photo 1

Ka Chi Kwok, San Francisco CA

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Specialties:
Counseling
Address:
982 Mission St, San Francisco, CA 94103
(415) 597-8000 (Phone)
Languages:
English
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Ka Chi Kwok, San Francisco CA

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Specialties:
Psychotherapist
Address:
982 Mission St, San Francisco, CA 94103

Resumes

Resumes

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Ka Kwok

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Location:
San Francisco, CA
Work:
Symantec Jan 2014 - Jan 2020
Financial Analyst
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Rfic

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Location:
San Francisco, CA
Industry:
Semiconductors
Work:
Mediatek
Rfic

Spacex
Rfic Engineer
Education:
Industrial Design Engineering, Tu Delft 2015
Doctorates, Doctor of Philosophy, Philosophy
The Hong Kong University of Science and Technology
Masters, Philosophy
The Hong Kong University of Science and Technology
Bachelor of Engineering, Bachelors
Skills:
Integrated Circuit
Mixed Signal
Analog
Asic
Cmos
Electronics
Rf
Wireless
Soc
Integrated Circuit Design
Circuit Design
Ic
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Clinical Social Worker

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Location:
San Francisco, CA
Industry:
Mental Health Care
Work:
Ucsf/Sfgh Department of Psychiatry
Clinical Social Worker
Education:
Golden Gate University 2011 - 2013
Masters, Master of Arts, Family Therapy
San Francisco State University 2007 - 2009
Bachelors, Bachelor of Arts, Social Work
Skills:
Mental Health
Dbt
Psychotherapy
Case Management
Cbt
Mental Health Counseling
Languages:
English
Cantonese
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Ka Kwok

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Location:
San Francisco, CA
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Ka Kwok

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Business Records

Name / Title
Company / Classification
Phones & Addresses
Ka Kwok
Principal
Lk Construction Co
Single-Family House Construction
14 Holloway Ave, San Francisco, CA 94112

Publications

Us Patents

Metastability Effects Simulation For A Circuit Description

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US Patent:
7356789, Apr 8, 2008
Filed:
May 27, 2005
Appl. No.:
11/140678
Inventors:
Tai An Ly - Austin TX, US
Ka Kei Kwok - Milpitas CA, US
Vijaya Vardhan Gupta - San Jose CA, US
International Classification:
G06F 17/50
G06F 9/45
US Classification:
716 5, 716 6
Abstract:
A circuit design that contains at least two clock domains is simulated using a novel system and method for injecting the effects of metastability. The system includes detectors for detecting, during simulation, when a clock in a transmit clock domain and a clock in a receive clock domain are aligned and when the input of a register receiving a clock-domain-crossing signal is changing. The system includes coverage monitors for measuring, during simulation, statistics related to metastability injection. The system accurately models the effects of metastability by, at appropriate times during simulation, pseudo-randomly inverting outputs of registers receiving clock-domain-crossing signals. By accurately modeling the effects of metastability, errors in the circuit design can be detected while simulating a pre-existing simulation test. The simulation with metastability effects injection is repeatable and requires no modification of pre-existing RTL design files or simulation test files.

Metastability Effects Simulation For A Circuit Description

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US Patent:
7712062, May 4, 2010
Filed:
Feb 11, 2008
Appl. No.:
12/029440
Inventors:
Tai An Ly - Austin TX, US
Ka Kie Kwok - Milpitas CA, US
Vijaya Vardhan Gupta - San Jose CA, US
International Classification:
G06F 17/50
G06F 9/45
US Classification:
716 5, 716 6
Abstract:
A circuit design that contains at least two clock domains is simulated using a novel system and method for injecting the effects of metastability. The system includes detectors for detecting, during simulation, when a clock in a transmit clock domain and a clock in a receive clock domain are aligned and when the input of a register receiving a clock-domain-crossing signal is changing. The system includes coverage monitors for measuring, during simulation, statistics related to metastability injection. The system accurately models the effects of metastability by, at appropriate times during simulation, pseudo-randomly inverting outputs of registers receiving clock-domain-crossing signals. By accurately modeling the effects of metastability, errors in the circuit design can be detected while simulating a pre-existing simulation test. The simulation with metastability effects injection is repeatable and requires no modification of pre-existing RTL design files or simulation test files.

Metastability Effects Simulation For A Circuit Description

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US Patent:
8438516, May 7, 2013
Filed:
May 4, 2010
Appl. No.:
12/773462
Inventors:
Tai An Ly - Austin TX, US
Ka Kei Kwok - Milpitas CA, US
Vijaya Vardhan Gupta - San Jose CA, US
Assignee:
Mentor Graphics Corporation - Wilsonville OR
International Classification:
G06F 17/50
G06F 9/455
US Classification:
716113, 716111
Abstract:
A circuit design that contains at least two clock domains is simulated using a novel system and method for injecting the effects of metastability. The system includes detectors for detecting, during simulation, when a clock in a transmit clock domain and a clock in a receive clock domain are aligned and when the input of a register receiving a clock-domain-crossing signal is changing. The system includes coverage monitors for measuring, during simulation, statistics related to metastability injection. The system accurately models the effects of metastability by, at appropriate times during simulation, pseudo-randomly inverting outputs of registers receiving clock-domain-crossing signals. By accurately modeling the effects of metastability, errors in the circuit design can be detected while simulating a pre-existing simulation test. The simulation with metastability effects injection is repeatable and requires no modification of pre-existing RTL design files or simulation test files.
Ka K Kwok from Austin, TX, age ~44 Get Report