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Julian Dowden Phones & Addresses

  • 10301 Ranch Road 2222, Austin, TX 78730 (512) 346-2949 (512) 531-0587
  • 10301 Ranch Road 2222 APT 1613, Austin, TX 78730 (512) 658-5843
  • Lakeway, TX
  • Renton, WA
  • Beaumont, TX
  • Leander, TX
  • Killeen, TX

Work

Company: Controlled fluids inc. - Beaumont, TX Apr 2014 Position: Designer / drafter

Education

School / High School: Austin Community College- Austin, TX 1999 Specialities: Multimedia Design

Skills

Design For Manufacturing • Electronics • Solidworks • Manufacturing • Engineering • Information Systems • Product Design • Product Development • Testing • Pcb Design • R&D • Cad • Coatings • Debugging • Mechanical Engineering • Medical Devices • Field Technicians • Sheet Metal • Embedded Systems • Software Documentation • Semiconductors • Material Properties • Lean Manufacturing • Electrical Engineering • Continuous Improvement • Fluidics

Ranks

Certificate: Solidworks Associate Cswa

Interests

Apparatus • Bromeliads • Electro Therapy Devices • Marine Aquariums • Ferns • Van Degraaff Generators • X Ray Tubes • Marx Generators • Macro Algae • Wimshurst Machines • Sterilization Devices • Opto Mechanical Devices • Tesla Coil Generators • Geissler Tubes • Crookes Tubes • Anesthesia Machines • Invertebrates • See 8 • Nano Fish • See Less • Antique Light Bulbs • Electro Surgical Devices

Industries

Research

Resumes

Resumes

Julian Dowden Photo 1

E And M Cad Training And Design

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Location:
10306 Morado Cv, Austin, TX 78759
Industry:
Research
Work:
Tactual Labs Co. Sep 2018 - Dec 2019
Junior Design Engineer

Luminex Corporation Jan 2016 - Oct 2016
Engineering Technician Ii

Luminex Corporation Apr 2015 - Jan 2016
Designer and Drafter

Controlled Fluids, Inc. Apr 2014 - Nov 2014
Designer and Drafter

Fabricon International Feb 2014 - Apr 2014
Designer and Drafter
Education:
Austin Community College 1998 - 2000
Lamar University 1993 - 1995
Skills:
Design For Manufacturing
Electronics
Solidworks
Manufacturing
Engineering
Information Systems
Product Design
Product Development
Testing
Pcb Design
R&D
Cad
Coatings
Debugging
Mechanical Engineering
Medical Devices
Field Technicians
Sheet Metal
Embedded Systems
Software Documentation
Semiconductors
Material Properties
Lean Manufacturing
Electrical Engineering
Continuous Improvement
Fluidics
Interests:
Apparatus
Bromeliads
Electro Therapy Devices
Marine Aquariums
Ferns
Van Degraaff Generators
X Ray Tubes
Marx Generators
Macro Algae
Wimshurst Machines
Sterilization Devices
Opto Mechanical Devices
Tesla Coil Generators
Geissler Tubes
Crookes Tubes
Anesthesia Machines
Invertebrates
See 8
Nano Fish
See Less
Antique Light Bulbs
Electro Surgical Devices
Certifications:
Solidworks Associate Cswa
Cadence Allegro Package Design
Cadence Allegro Pcb Layout System
Solidworks Essentials
Cadkey Advanced Solids
Allegro Package Design
Allegro Pcb Layout System
Allegro Package Designer
Julian Dowden Photo 2

Julian Dowden Beaumont, TX

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Work:
Controlled Fluids Inc.
Beaumont, TX
Apr 2014 to Nov 2014
Designer / Drafter

Fabricon International Inc.
Beaumont, TX
Feb 2014 to Apr 2014
Designer / Drafter

International Biomedical
Austin, TX
Feb 2013 to Aug 2013
Mechanical Designer

Dynamic Manufacturing Solutions LLC
Austin, TX
May 2012 to Aug 2012
Engineering Technician

Technology Kitchen
Austin, TX
Oct 2011 to Jan 2012
E/M Designer

Applied Physical Electronics LC
Austin, TX
Apr 2010 to Oct 2011
Technical Consultant

Applied Physical Electronics LC
Austin, TX
Jan 2008 to Apr 2010
Electrical & Mechanical Designer

ION Design Inc
Austin, TX
Oct 2007 to Jan 2008
SR Designer

STAKTEK Group LLP
Austin, TX
Sep 1996 to Apr 2006
Electrical & Mechanical Designer

Helena Laboratories, (consumables division)
Beaumont, TX
Sep 1993 to Sep 1996
Design Drafter & Engineering Technician

Helena Laboratories, (OEM division)
Beaumont, TX
Feb 1992 to Sep 1993
Detail drafter

Education:
Austin Community College
Austin, TX
1999
Multimedia Design

Lamar University Tech. Arts Center
Beaumont, TX
1993
CAD and Drafting

Publications

Us Patents

Stacking System And Method

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US Patent:
6608763, Aug 19, 2003
Filed:
Sep 15, 2000
Appl. No.:
09/663753
Inventors:
Carmen D. Burns - Austin TX
James G. Wilder - Austin TX
Julian Dowden - Austin TX
Assignee:
Staktek Group L.P. - Austin TX
International Classification:
H01R 1216
US Classification:
361790, 257686, 439109
Abstract:
A system and method for selectively stacking and interconnecting individual integrated circuit devices to create a high density integrated circuit module. Connections between stack elements are made through carrier structures that provide inter-element connections that substantially follow an axis that is substantially perpendicular to the vertical axis of the stack. The carrier structure provides connection between elements through conductive paths disposed to provide connection between the foot of an upper IC element and the upper shoulder of the lower IC element. This leaves open to air flow most of the vertical transit section of the lower lead for cooling while creating an air gap between elements that encourages cooling airflow between the elements of the stack. A method for creating stacked integrated circuit modules according to the invention is provided.

Wide Data Path Stacking System And Method

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US Patent:
6618257, Sep 9, 2003
Filed:
Jul 27, 2001
Appl. No.:
09/916625
Inventors:
James Cady - Austin TX
David L. Roper - Austin TX
James G. Wilder - Austin TX
Julian Dowden - Austin TX
Jeff Buchle - Austin TX
Assignee:
Staktek Group, L.P. - Austin TX
International Classification:
H05K 700
US Classification:
361728, 361679, 257686, 257773, 257774, 257777
Abstract:
Provided is a system and method for selectively stacking and interconnecting integrated circuit devices having a data path of n-bits to create a high-density integrated circuit module having a data path of greater than n-bits. Integrated circuits are vertically stacked one above the other. Where the constituent IC elements have a data path of n-bits in width, a module devised in accordance with a preferred embodiment of the present invention presents a data path 2n-bits wide. In a preferred embodiment, an interconnection frame comprised of printed circuit board material is disposed about two similarly oriented ICs to provide interconnectivity of the constituent ICs and concatenation of their respective data paths. An array of clip-leads or other connectors are appended to module connection pads to provide lead-like structures for connection of the module to its operating environment. In a two-high stack, address lines of the constituent ICs are interconnected, while the data lines of the respective ICs are concatenated to double the data path width of the stack relative to the data path width of the constituent ICs.

Pitch Change And Chip Scale Stacking System

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US Patent:
7053478, May 30, 2006
Filed:
Aug 9, 2004
Appl. No.:
10/914483
Inventors:
David L. Roper - Austin TX, US
James W. Cady - Austin TX, US
James Wilder - Austin TX, US
Jeff Buchle - Austin TX, US
Julian Dowden - Austin TX, US
Assignee:
Staktek Group L.P. - Austin TX
International Classification:
H01L 23/02
US Classification:
257686, 257777, 438109, 361735, 361790
Abstract:
The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and its application environment. The module has a ballout pattern with a different pitch and/or supplemental module contacts devised to allow combined signaling to the integrated circuits through contacts having a desired ballout footprint. The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules provided for high-density memories or high capacity computing.

Pitch Change And Chip Scale Stacking System And Method

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US Patent:
7202555, Apr 10, 2007
Filed:
Mar 8, 2005
Appl. No.:
11/074026
Inventors:
David L. Roper - Austin TX, US
James W. Cady - Austin TX, US
James Wilder - Austin TX, US
Jeff Buchle - Austin TX, US
Julian Dowden - Austin TX, US
Assignee:
Staktek Group L.P. - Austin TX
International Classification:
H01L 23/02
US Classification:
257686, 257777, 438109, 361749, 361790
Abstract:
The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and its application environment. The module has a bailout pattern with a different pitch and/or supplemental module contacts devised to allow combined signaling to the integrated circuits through contacts having a desired ballout footprint. The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules provided for high-density memories or high capacity computing.

Stacking System And Method

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US Patent:
7495334, Feb 24, 2009
Filed:
Aug 4, 2005
Appl. No.:
11/197267
Inventors:
Russell Rapport - Austin TX, US
James W. Cady - Austin TX, US
James Wilder - Austin TX, US
David L. Roper - Austin TX, US
Jeff Buchle - Austin TX, US
Julian Dowden - Austin TX, US
Assignee:
Entorian Technologies, LP - Austin TX
International Classification:
H01L 23/48
H01L 23/52
H01L 29/40
US Classification:
257738, 257686, 257737, 361735, 361736
Abstract:
The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a two-high CSP stack or module devised in accordance with a preferred embodiment of the present invention, two CSPs are stacked, with one CSP disposed above the other. The two CSPs are connected with flex circuitry. A form standard is disposed between the flex circuitry and a CSP in the stack. The form standard can take many configurations and may be used where flex circuits are used to connect CSPs to one another in stacked modules having two or more constituent CSPs. For example, in stacked modules that include four CSPs, three form standards are employed in preferred embodiments, although fewer may be used. The form standard provides a thermally conductive physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.

Stacking System And Method

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US Patent:
20030137048, Jul 24, 2003
Filed:
Mar 27, 2003
Appl. No.:
10/400309
Inventors:
James Cady - Austin TX, US
James Wilder - Austin TX, US
David Roper - Austin TX, US
James Wehrly - Austin TX, US
Julian Dowden - Austin TX, US
Jeff Buchle - Austin TX, US
Assignee:
Staktek Group, L.P.
International Classification:
H01L023/14
US Classification:
257/723000, 257/686000, 361/789000
Abstract:
The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and an application environment such as a printed wiring board (PWB). The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules provided for high-density memories or high capacity computing.

Stacked Module Systems And Methods For Csp Packages

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US Patent:
20050009234, Jan 13, 2005
Filed:
Aug 6, 2004
Appl. No.:
10/913220
Inventors:
Julian Partridge - Austin TX, US
James Wehrly - Austin TX, US
Julian Dowden - Austin TX, US
David Roper - Austin TX, US
James Cady - Austin TX, US
International Classification:
H01L021/44
H01L023/02
US Classification:
438109000, 257777000, 257686000
Abstract:
The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. Multiple numbers of CSPs may be stacked in accordance with the present invention. The CSPs employed in stacked modules devised in accordance with the present invention are connected with flex circuitry. A form standard is disposed along a planar surface of a CSP. The form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. The form standard achieves a reduced profile after the CSP has been attached to the form standard. In addition, in constructing modules in accordance with some preferred modes of the invention, CSP contacts are reduced in height to create lower profile modules. Thus, low profile embodiments of the modules of the present invention are devised.

Stacking System And Method

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US Patent:
20060091521, May 4, 2006
Filed:
Dec 21, 2005
Appl. No.:
11/316505
Inventors:
James Cady - Austin TX, US
James Wilder - Austin TX, US
David Roper - Austin TX, US
James Wehrly - Austin TX, US
Julian Dowden - Austin TX, US
Jeff Buchle - Austin TX, US
International Classification:
H01L 23/48
US Classification:
257686000, 257777000, 257723000
Abstract:
The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and an application environment such as a printed wiring board (PWB). The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules provided for high-density memories or high capacity computing.
Julian D Dowden from Austin, TX, age ~54 Get Report