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Jonathan Gainsley Phones & Addresses

  • 1191 Solana Dr, Mountain View, CA 94040 (650) 963-6176
  • 255 Rengstorff Ave, Mountain View, CA 94040
  • 707 Continental Cir, Mountain View, CA 94040
  • 15047 Joanne Ave, San Jose, CA 95127
  • Honolulu, HI
  • Claremont, CA
  • Santa Clara, CA
  • 255 S Rengstorff Ave APT 27, Mountain View, CA 94040

Work

Company: Sun microsystems Jul 1999 Position: Staff engineer

Education

Degree: Masters of Science School / High School: Stanford University 2001 to 2003 Specialities: Electrical Engineering

Industries

Computer Networking

Resumes

Resumes

Jonathan Gainsley Photo 1

Senior Principal Engineer

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Location:
1191 Solana Dr, Mountain View, CA 94040
Industry:
Computer Networking
Work:
Sun Microsystems since Jul 1999
Staff Engineer
Education:
Stanford University 2001 - 2003
Masters of Science, Electrical Engineering
Harvey Mudd College 1995 - 1999
Bachelors of Science, Engineering

Publications

Us Patents

Apparatus And Method For Asynchronously Controlling Data Transfers Across Long Wires

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US Patent:
7453882, Nov 18, 2008
Filed:
Aug 25, 2004
Appl. No.:
10/927285
Inventors:
Ronald Ho - Mountain View CA, US
Jonathan K. Gainsley - Mountain View CA, US
Robert J. Drost - Mountain View CA, US
Assignee:
Sun Microsystems, Inc. - Santa Clara CA
International Classification:
H04L 12/28
G06F 3/00
US Classification:
3703951, 370431, 710 20, 712 22
Abstract:
One embodiment of the present invention provides a system that asynchronously controls the sending of data items from a sender to a receiver. The system includes a data path between the sender and the receiver, a first control path between the sender and the receiver, and a second control path between the sender and the receiver. The first control path and the second control path alternately control the asynchronous transmission of consecutive data items on the data path between the sender and the receiver.

Method And Apparatus For Asynchronously Controlling Domino Logic Gates

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US Patent:
20030201796, Oct 30, 2003
Filed:
Apr 29, 2002
Appl. No.:
10/135166
Inventors:
Josephus C. Ebergen - San Francisco CA, US
Ivan E. Sutherland - Santa Monica CA, US
Jon Lexau - Beaverton OR, US
Jonathan Gainsley - Mountain View CA, US
International Classification:
H03K019/096
US Classification:
326/095000
Abstract:
One embodiment of the present invention provides a domino logic circuit that operates asynchronously. This domino logic circuit includes a number of stages, including a present stage that receives one or more inputs from a prior stage and generates one or more outputs for a next stage. It also includes a control circuit that ensures that the present stage enters a precharging state before entering a subsequent evaluation state in which one or more inputs of the present stage are used to generate one or more outputs. This control circuit receives a prior control signal from the prior stage and sends a present control signal to the next stage
Jonathan K Gainsley from Mountain View, CA, age ~48 Get Report