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John J Shedletsky

from West Chester, PA
Age ~73

John Shedletsky Phones & Addresses

  • 209 Hunting Hill Ln, West Chester, PA 19382 (347) 200-4678
  • Dewey Beach, DE
  • 200 Salmons Hollow Rd, Brewster, NY 10509

Resumes

Resumes

John Shedletsky Photo 1

Founder

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Location:
West Chester, PA
Industry:
Computer Software
Work:
Compressus Jun 2013 - Jan 2015
Executive Vice President of Engineering

Ibm Jun 1976 - Jun 2013
Vice President Competitive Technology

Rehoboth Redevelopment Jun 1976 - Jun 2013
Founder
Education:
Stanford University 1974 - 1976
Doctorates, Doctor of Philosophy, Electrical Engineering, Electrical Engineering and Computer Science, Computer Science, Philosophy
Stanford University 1972 - 1974
Master of Science, Masters, Computer Science
University of Delaware 1968 - 1972
Bachelors, Electrical Engineering
Skills:
Managing Complex Technical Projects
Making Informed Decisions With Imperfect Information
Ability To Make Progress Despite Adverse Conditions
Capable of Understanding Solutions From A System Wide Perspective
Having Worked With and Learned From Leading It Industry Executives
System Performance Analysis and Optimization
People Management To Build A Team
Team Player
Speaking Skills
Ability To Teach
World Wide Travel
Leverage Outsourcing
Research
Microsoft Office
Microsoft Excel
Microsoft Word
Powerpoint
Languages:
French
John Shedletsky Photo 2

John Shedletsky

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Business Records

Name / Title
Company / Classification
Phones & Addresses
John Shedletsky
President
John Shedletsky
Custom Computer Programing
200 Salmons Holw Rd, Sears Corners, NY 10509

Publications

Us Patents

System For Selecting A Computer Solution From A Pre-Defined Set

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US Patent:
6341276, Jan 22, 2002
Filed:
Mar 1, 1995
Appl. No.:
08/397292
Inventors:
Craig Samuel Bender - Brewster NY
John James Shedletsky - Brewster NY
Assignee:
IBM Corporation - Armonk NY
International Classification:
G06N 504
US Classification:
706 50, 706 10, 706 21, 706 45
Abstract:
An expert system selects a computer solution from a set of predefined, proven solution to meet a specific need. Each of the predefined solutions comprises a plurality of hardware platforms and associated software, and a communication facility between the hardware platforms. The system identifies and directs display of a multiplicity of different characteristics of computer solutions within the set. Then, the user selects one of the characteristics to reduce the number of possible solutions from the set. In response, the system may then display other characteristics which can be selected to further reduce the number of possible solutions from those identified after the one characteristic was selected. According to a preferred embodiment of the present invention, this narrowing process always results in one or more solutions from the set; there are no âdead endsâ. After the last characteristic is selected, the system identifies and directs display of a final subset of the set corresponding to the selected characteristics.

Systems And Methods To Facilitate Compliance With Location Dependent Requirements

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US Patent:
20030032434, Feb 13, 2003
Filed:
Aug 7, 2001
Appl. No.:
09/923492
Inventors:
Barry Willner - Briarcliff Manor NY, US
John Shedletsky - Brewster NY, US
Edith Stern - Yorktown Heights NY, US
Philip Yu - Chappaqua NY, US
David Greene - Ossining NY, US
International Classification:
H04Q007/20
US Classification:
455/456000, 455/459000
Abstract:
Systems and methods are provided to facilitate compliance with location dependent requirements, such as laws and regulations that vary from jurisdiction to jurisdiction. According to one embodiment, location information associated with a user is determined. Requirement information is then determined based on the location information. The user's compliance with the requirement information is then facilitated, such as by displaying an appropriate indication to the user.

Expert System For Designing Computer Networks

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US Patent:
55577750, Sep 17, 1996
Filed:
Feb 23, 1994
Appl. No.:
8/200249
Inventors:
John J. Shedletsky - Brewster NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 930
G06F 1310
US Classification:
395500
Abstract:
An expert system is used to design a computer network comprising hardware platforms, applications, data bases, user interfaces, etc. The expert system initially displays questions and receives responsive information from a user as to characteristics of backend data bases and whether copies of said backend data bases should be stored in respective frontend data bases. In response, the expert system "builds" one of a predetermined set of backend models which corresponds to the information. Next, to reduce complexity, the expert system identifies two or more of the frontend data bases of compatible type that can be merged together and then displays questions and receives responsive information indicating whether the mergers should be made. Next, the expert system displays questions and receives responsive information as to characteristics of frontend components including an intermediate server. In response, the expert system builds one of a set of predetermined frontend models which corresponds to the information.

Logic Simulation Machine

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US Patent:
43062865, Dec 15, 1981
Filed:
Jun 29, 1979
Appl. No.:
6/053444
Inventors:
John Cocke - Bedford Village NY
Richard L. Malm - San Jose CA
John J. Shedletsky - North Salem NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1516
US Classification:
364200
Abstract:
A hardware logic simulation machine comprised of an array of specially designed parallel processors, with there being no theoretical limit to the number of processors which may be assembled into the array. Each processor executes a logic simulation function wherein the logic subnetwork simulated by each processor is implicitly described by a program loaded into each processor instruction memory. Logic values simulated by one processor are communicated to other processors by a switching mechanism controlled by a controller. If the array consists of i processor addresses, the switch is a full i-by-i way switch. Each processor is operated in parallel, and the major component of each processor is a first set of two memory banks for storing the simulated logic values associated with the output of each logic block. A second set of two memory banks are included in each processor for storing logic simulations from other processors to be combined with the logic simulation stored in the first set of memory banks.
John J Shedletsky from West Chester, PA, age ~73 Get Report