Inventors:
Charles H. Winstead - Portland OR, US
Rajshree P. Sankaran - Portland OR, US
Samer M. Taha - Beaverton OR, US
Jiang Qu - Portland OR, US
Chandra Mouli - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 19/00
US Classification:
700100, 700 86, 700 97, 700121
Abstract:
According to embodiments of the invention, an integrated configuration, flow and execution systems (ICFES) may be used to specify, control and record a history of processing of both semiconductor device experimental lots and production lots of wafers. Moreover, the system allows combining of one or more partial flows of pre-existing flow blocks, and special processing into another processing flow block. A lot plan can be created that includes the flow block, and the lot plan can be updated to include partial flows and special processing before or during processing of the lot plan.