Jianxun Li

6465157, Oct 15, 2002

Jan 31, 2000

09/494638

Jianxun Li - Orlando FL
Mei Sheng Zhou - Singapore, SG
Subhash Gupta - Singapore, SG
Ming hui Far - Orlando FL

Chartered Semiconductor Manufacturing Ltd - Singapore

G03F 700

430313, 430311, 430312, 430394

A new method of forming dual damascene interconnects has been achieved. A semiconductor substrate is provided. A dielectric layer is provided overlying the semiconductor substrate. A first photoresist layer is deposited overlying the dielectric layer. The first photoresist layer is exposed, but not developed, to define patterns where via trenches are planned. A second photoresist layer is deposited overlying the first photoresist layer. The second photoresist layer is exposed to define patterns where interconnect trenches are planned. The second photoresist layer and the first photoresist layer are developed to complete the via trench pattern of the first photoresist layer and the interconnect trench pattern of the second photoresist layer. The dielectric layer is etched through where defined by the via trench pattern of the first photoresist layer. The dielectric layer is etch where defined by the interconnect pattern of the second photoresist layer, and the dual damascene interconnect of the integrated circuit device is completed.