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Jerry Gladstone Phones & Addresses

  • 364 Singing Brook Cir, Santa Rosa, CA 95409 (707) 525-8623
  • 3772 Saint Andrews Dr, Santa Rosa, CA 95403 (707) 525-8623
  • 2631 Fir Park Way, Santa Rosa, CA 95404 (707) 525-8623
  • Denver, CO
  • San Francisco, CA
  • Los Angeles, CA
  • 3772 Saint Andrews Dr, Santa Rosa, CA 95403

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Position: Administration/Managerial

Education

Degree: Graduate or professional degree

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Strategic Planning • Business Strategy • Entrepreneurship • Start Ups • Business Planning • Marketing Strategy • Technology Management • Product Management • Management • Product Development • Marketing • Due Diligence • Business Development • Manufacturing • Supply Chain Management • Management Consulting • Program Management • Testing • Strategic Partnerships • Mergers and Acquisitions • Competitive Analysis • Product Marketing • Cross Functional Team Leadership • Saas • Process Improvement • Business Process Improvement

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Resumes

Jerry Gladstone Photo 1

Jerry Gladstone

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Location:
Santa Rosa, CA
Industry:
Management Consulting
Skills:
Strategic Planning
Business Strategy
Entrepreneurship
Start Ups
Business Planning
Marketing Strategy
Technology Management
Product Management
Management
Product Development
Marketing
Due Diligence
Business Development
Manufacturing
Supply Chain Management
Management Consulting
Program Management
Testing
Strategic Partnerships
Mergers and Acquisitions
Competitive Analysis
Product Marketing
Cross Functional Team Leadership
Saas
Process Improvement
Business Process Improvement

Publications

Wikipedia References

Jerry Gladstone Photo 2

Jerry Gladstone

Us Patents

Digital Symmetric Waveform Synthesizer

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US Patent:
39834930, Sep 28, 1976
Filed:
Jun 27, 1975
Appl. No.:
5/590991
Inventors:
Jerry M. Gladstone - Santa Rosa CA
Assignee:
GTE Laboratories Incorporated - Waltham MA
International Classification:
H03K 2308
H03K 1402
G11C 1928
G06G 728
US Classification:
328 14
Abstract:
A waveform synthesizer for generating analog waveforms is provided utilizing all MOSFET integrated circuit logic. The synthesizer includes an n stage clocked shift register in which the input to the first shift register stage is the inverted output of the last shift register stage. The output of each stage controls the state of a preselected weighting unit field effect transistor which provides a preselected output whenever the corresponding shift register stage is a logic 1. The outputs of all the weighting unit transistors are summed and applied to a summing field effect transistor.
Jerry M Gladstone from Santa Rosa, CA, age ~80 Get Report