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Jay Tatsuo Fukumoto

from Fort Collins, CO
Age ~64
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Also known as:
Jay T Fukumoto, Jay T Fukimoto
Phone and address:
2831 Zendt Dr, Fort Collins, CO 80526
(970) 282-3711
Related to:
Debra Speaker, 63Jordan T Speaker, 40Mabel F TrsteesAutumn Speaker, 31
Connected to:
Dane K Fukumoto, 48Ellen M Fukumoto, 65Emily Fukumoto, 34Kara M Fukumoto, 41Kendall Y Fukumoto, 47Reid O Fukumoto, 63Satoshi Fukumoto, 41Scott H Fukumoto, 53Yasuhiro A Fukumoto, 63Mai Fukumura, 51

Jay Fukumoto Phones & Addresses

  • 2831 Zendt Dr, Fort Collins, CO 80526 (970) 282-3711
  • Ft Collins, CO
  • Las Vegas, NV
  • Colorado Springs, CO
  • Chicago, IL
  • Atlanta, GA
  • 2831 Zendt Dr, Fort Collins, CO 80526

Work

Position: Precision Production Occupations

Education

Degree: Bachelor's degree or higher

Resumes

Resumes

Jay Fukumoto Photo 1

Engineer

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Location:
Fort Collins, CO
Industry:
Semiconductors
Work:
Lsi Corporation
Engineer
Education:
University of Illinois at Urbana - Champaign 1979 - 1983
Bachelors, Electronics Engineering, Electronics
Jay Fukumoto Photo 2

Jay Fukumoto

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Jay Fukumoto Photo 3

Jay Fukumoto

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Publications

Us Patents

High Performance Voltage Control Diffusion Resistor

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US Patent:
7071811, Jul 4, 2006
Filed:
Sep 23, 2003
Appl. No.:
10/668875
Inventors:
Sean Christopher Erickson - Fort Collins CO, US
Jonathan Alan Shaw - Fort Collins CO, US
Jay Tatsuo Fukumoto - Fort Collins CO, US
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
H01C 1/012
US Classification:
338309, 338325
Abstract:
The present invention provides a diffusion resistor that is formed in the substrate. A diffusion region is formed within the substrate that contains a first and second contact region. These contact regions extend downward from the surface of the substrate. A third contact is located within the diffusion region between the first and second contacts. This contact also extends downward from the surface of the substrate. These contacts are connected to metal layers. The first and second contacts form the two ends of the diffusion resistor. The third contact forms a Schottky diode such that application of a voltage to this contact forms a depletion region within the diffusion region. The depletion region changes in size depending on the voltage applied to the third contact to change the resistance of the depletion resistor.

Method For Simulating Resistor Characteristics At High Electric Fields

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US Patent:
7288947, Oct 30, 2007
Filed:
Dec 19, 2005
Appl. No.:
11/316011
Inventors:
Sangjune Park - Colorado Springs CO, US
Jay T. Fukumoto - Fort Collins CO, US
Kenneth J. Paradis - Loveland CO, US
Assignee:
LSI Corporation - Milpitas CA
International Classification:
G01R 27/08
G01R 31/02
US Classification:
324713, 324549
Abstract:
A method for characterizing the current as a function of applied electric field for a resistor exposed to a high electric fields is described. The method uses current versus voltage measurements at low electric fields, where the resistor is not damaged and the current does not saturate. An example illustrating the importance of such resistor characterization is provided.

High Performance Voltage Controlled Poly Resistor For Mixed Signal And Rf Applications

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US Patent:
20050116301, Jun 2, 2005
Filed:
Dec 1, 2003
Appl. No.:
10/725640
Inventors:
Jonathan Shaw - Fort Collins CO, US
Jay Fukumoto - Fort Collins CO, US
Sean Erickson - Fort Collins CO, US
International Classification:
H01L029/76
US Classification:
257380000
Abstract:
A voltage-controlled, variable polysilicon resistor is formed of polysilicon deposited in the first interlayer dielectric layer at the same time that polysilicon routing is created. The polysilicon resistor, which is formed of n− doped polysilicon, has three contact regions connected to the metal layers. A region at either end of the resistor is doped n+ and forms the positive and negative terminals of the resistor. A third contact region is located within the polysilicon region between the first and second contacts to form a Schottky diode such that application of a voltage to this contact forms a depletion region within the polysilicon region. The depletion region changes in size depending on the voltage applied to the third contact to change the resistance of the depletion resistor.

Localized Use Of High-K Dielectric For High Performance Capacitor Structures

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US Patent:
20060089001, Apr 27, 2006
Filed:
Oct 27, 2004
Appl. No.:
10/974115
Inventors:
Sean Erickson - Fort Collins CO, US
Jay Fukumoto - Fort Collins CO, US
International Classification:
H01L 21/311
H01L 21/302
US Classification:
438694000, 438718000, 438720000
Abstract:
Techniques are provided for localized use of high-K dielectric material within a capacitor structure. Low-K dielectric is deposited or spun on as usual. Then, a larger area is etched back and then filled with high-K dielectric material. The high-K dielectric material is then patterned and copper routing lines are trenched in and then filled with metal. A dual damascene process may be used to connect a second metal layer using a series of vias for each metal line. In an aluminum process, an insulator layer is formed over the substrate and an aluminum layer is formed over the insulator layer. The aluminum layer is etched back to for metal lines over the insulator layer. The remaining area is filled with low-K dielectric. Then, the area between the metal lines is etched back and filled with high-K dielectric to increase the capacitance value of the structure.
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Jay Tatsuo Fukumoto from Fort Collins, CO, age ~64 Get Report