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Jason P Rhode

from Austin, TX
Age ~54

Jason Rhode Phones & Addresses

  • 901 W 9Th St APT 1102, Austin, TX 78703 (512) 707-0949
  • 1005 Daniel Dr, Austin, TX 78704 (512) 707-0949
  • 710 Colorado St, Austin, TX 78701 (512) 478-6484
  • Placerville, CO
  • Healdsburg, CA
  • Briarcliff, TX
  • Cary, NC
  • Monmouth Bch, NJ
  • Travis, TX

Skills

Design • Manufacturing Engineer • Manufacturing • Ic Design • Cirrus • Ic

Resumes

Resumes

Jason Rhode Photo 1

Jason Rhode

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Skills:
Design
Manufacturing Engineer
Manufacturing
Ic Design
Cirrus
Ic

Business Records

Name / Title
Company / Classification
Phones & Addresses
Jason P. Rhode
President
Ncl Communications Inc
Jason Rhode
Director
Cirrus Logic
Semiconductors
800 W 6 St, Austin, TX 78701
(512) 851-4000
Jason Rhode
President/ceo
CIRRUS LOGIC, INC
2394 E Camelback Rd, Phoenix, AZ 85016
1209 Orange St, Wilmington, DE 19801
800 W 6 St, Austin, TX 78701
Jason Rhode
Director
CRYSTAL SEMICONDUCTOR CORPORATION
800 W 6 St C/O Ky Cauble, Austin, TX 78701
800 W 6 St, Austin, TX 78701
Jason P. Rhode
Director, CEO
CIRRUS LOGIC INC
Mfg Integrated Circuits · Mfg of Integrated Circuits · Semiconductors and Related Devices · Semiconductor Devices (Manufac
2901 Via Fortuna Attn: Ky Cauble, Austin, TX 78746
2901 Via Fortuna, Austin, TX 78746
(512) 851-4000, (512) 851-4465, (512) 851-4678, (512) 851-4909
Jason P Rhode
President/ceo
ACOUSTIC TECHNOLOGIES, INC
Business Consulting Services · Business Consulting, NEC · Other Electronic Parts Merchant Whols · Telecommunication Equip/Syst-W · Electrical Work
1620 S Stapley #201, Mesa, AZ 85204
1209 Orange St, Wilmington, DE 19801
800 W 6 St, Austin, TX 78701
(480) 507-4300

Publications

Us Patents

Common Mode Shift In Downstream Integrators Of High Order Delta Sigma Modulators

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US Patent:
6369729, Apr 9, 2002
Filed:
Oct 8, 1999
Appl. No.:
09/415294
Inventors:
Vishnu S. Srinivasan - Austin TX
Jason Rhode - Austin TX
Assignee:
Cirrus Logic, Inc. - Austin TX
International Classification:
H03M 302
US Classification:
341143, 341155
Abstract:
A technique for shifting a common mode voltage in a modulator comprised of a plurality of differential stages, so that downstream stages can use a lower voltage drive than the first stage of the modulator.

Circuit Systems And Methods For Multirate Digital-To-Analog Amplifier Systems

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US Patent:
6462690, Oct 8, 2002
Filed:
Apr 2, 2001
Appl. No.:
09/825445
Inventors:
Johann Guy Gaboriau - Austin TX
Xiaofan Fei - Austin TX
Evan Logan Marchman - Austin TX
Jason Powell Rhode - Austin TX
Assignee:
Cirrus Logic, Inc. - Austin TX
International Classification:
H03M 166
US Classification:
341144, 341143, 341 61, 341 50, 341 77, 341 79, 455560, 381119
Abstract:
A multirate digital-to-analog amplifier system is disclosed. An interpolator is configured to interpolate digital values between samples of a digital signal from a digital signal source, in which the digital signal has a first sample rate. An output signal from the interpolator has a second, predetermined sample rate, which is independent of the first sample rate, of the digital signal. An amplifier is configured to amplify a digital signal having the second sample rate in response to the output signal of the interpolator.

Digital-To-Analog Converter With Power Up/Down Transient Suppression And Automatic Rate Switching

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US Patent:
6492928, Dec 10, 2002
Filed:
Jul 18, 2001
Appl. No.:
09/908672
Inventors:
Jason P. Rhode - Austin TX
John J. Paulos - Austin TX
Andrew W. Krone - Austin TX
Richard Bocock - Austin TX
Assignee:
Cirrus Logic, Inc. - Austin TX
International Classification:
H03M 166
US Classification:
341144, 341135
Abstract:
Power-up and power-down transient suppression are provided for an audio digital-to-analog converter with a single ended output to prevent annoying pops which accompany switching an audio system on and off. Power-up suppression is achieved by clamping an output signal to ground, driving the audio channel to ground, releasing the clamp and driving the audio channel gradually to its quiescent (zero signal) value. Power-down suppression is provided by using a positive feedback amplifier to accelerate current drain initiated by a constant current source used to bleed off the charge on output capacitor. The audio digital-to-analog converter sets operational mode based on ratios of a master clock to a channel selection clock. The techniques disclosed apply readily to the outputs received from CDs, CD-ROMs, DAT and other digital recording media.

Circuits Systems And Methods For Power Digital-To-Analog Converter Protection

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US Patent:
6522273, Feb 18, 2003
Filed:
Apr 2, 2001
Appl. No.:
09/825091
Inventors:
Xiaofan Fei - Austin TX
Johann Guy Gaboriau - Austin TX
Jason Powell Rhode - Austin TX
John Laurence Melanson - Austin TX
Eric Walburger - Austin TX
Assignee:
Cirrus Logic, Inc. - Austin TX
International Classification:
H03M 116
US Classification:
341139, 341144
Abstract:
An apparatus and method for power digital-to-analog converter protection are implemented. An attenuation value is set in response to the value of the supply voltage. The attenuation value is provided to a gain control, along with the input signal. A gain, offset by the attenuation value, determines the gain-adjusted output signal of the gain control generated from the input signal.

Digital-To-Analog Converter With Power Up/Down Transient Suppression And Automatic Rate Switching

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US Patent:
6522278, Feb 18, 2003
Filed:
Feb 19, 2002
Appl. No.:
10/078824
Inventors:
Jason P. Rhode - Austin TX
Johann G. Gaboriau - Austin TX
Xiaofan Fei - Austin TX
Assignee:
Cirrus Logic, Inc. - Austin TX
International Classification:
H03M 166
US Classification:
341144, 341143, 341118
Abstract:
Power-up and power-down transient suppression are provided for an audio digital-to-analog converter with a single ended output to prevent annoying pops which accompany switching an audio system on and off. Power-up suppression is achieved by driving the output of a pulse-width circuit to a reference level such as around, and driving the pulse-width circuit gradually to its quiescent (zero signal) value. Power-down suppression is provided by using a positive feedback amplifier to accelerate current drain initiated by a constant current source used to bleed off the charge on output capacitor. The techniques disclosed apply readily to the outputs received from CDs, CD-ROMs, DAT and other digital recording media.

Apparatus And Method For Multi-Channel Digital To Analog Conversion Of Signals With Different Sample Rates

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US Patent:
6531975, Mar 11, 2003
Filed:
May 24, 2001
Appl. No.:
09/865079
Inventors:
Brian D. Trotter - Austin TX
Thomas D. Stein - Austin TX
Heling Yi - Austin TX
Jason P. Rhode - Austin TX
Timothy T. Rueger - Austin TX
Assignee:
Cirrus Logic, Incorporated - Austin TX
International Classification:
H03M 166
US Classification:
341144, 341123, 341141
Abstract:
An apparatus and method for converting digital input signals sampled at different rates to analog signals includes a digital to analog converter for each digital input signal. Each digital to analog converter receives a digital input signal and a clock signal corresponding to the sampling rate of the received digital input signal. The apparatus can also receive a set of sample rate signals indicating the sampling rate for each digital input signal. The sample rate signals are used to route each digital input signal, along with a corresponding clock signal, to a corresponding digital to analog converter (DAC). A clock error signal controls routing of the digital input signals to the DACs as well as operation of the DACs. A clock divider and ratio detector module generates the clock error signal based on intermediate clock error signals that correspond to the sample rates.

Frequency Detect Circuit For Determining Sample Speed Mode Of Decoded Audio Input Data Streams

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US Patent:
6556157, Apr 29, 2003
Filed:
Aug 15, 2001
Appl. No.:
09/929917
Inventors:
Nadi Rafik Itani - Austin TX
Jason Rhode - Austin TX
Assignee:
Cirrus Logic, Inc.
International Classification:
H03M 100
US Classification:
341123, 341 61
Abstract:
Disclosed is a data converter and a method for converting a digital audio stream representing an analog signal that has been sampled at a certain rate. The circuit includes a divider that receives a clock signal associated with the digital audio stream and divides the clock signal by a selectable division factor. The division factor is set according to divider control signals. At the output of the divider is provided an internal clock signal. A frequency detection circuit receives the signal from the output of the divider, and the frequency detection circuit detects the original sampling rate of the audio signal based upon intrinsic characteristics (e. g. , MCLK to LRCK ratio) of the digital audio stream. The frequency detection circuit, which may also be used with a separate rate detection circuit to accomplish its function, then generates the divider control signals to the divider to set the division factor in the divider such that the internal clock signal has a known relationship to the original sampling rate based on the sampling mode. A digital processing circuit then receives the internal clock signal from the divider, derives incoming data from the digital audio stream, and generates an output signal.

One Line Data Format For Audio Analog-To-Digital Converters

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US Patent:
6657574, Dec 2, 2003
Filed:
Dec 9, 2002
Appl. No.:
10/314555
Inventors:
Jason Powell Rhode - Austin TX
Assignee:
Cirrus Logic, Inc. - Austin TX
International Classification:
H03M 112
US Classification:
341155, 341141
Abstract:
An analog-to-digital converter is provided for converting multiple analog inputs into corresponding digital values. An output interface circuit uses differential signaling to reduce noise and interference induced in the analog portions of the analog-to-digital converter.
Jason P Rhode from Austin, TX, age ~54 Get Report