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James M Carwana

from San Jose, CA
Age ~43
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Related to:
Steven A Druskin, 52Rella D PattersonValerie Wilner, 41Brian Wilner, 43George Patterson
Connected to:
Derek L Carwardine, 50Vicky L Carwein, 76Darriell Carwell, 38Veronica M Carwell, 44Chad A Carwile, 32Dan J Carwile, 70Jared P Carwile, 44Jason E Carwile, 50Jennifer Carwile, 50Judy E Carwile, 67

James Carwana Phones & Addresses

  • 2494 La Mirada Dr, San Jose, CA 95125
  • 8 Serenity Ln, Laguna Niguel, CA 92677 (949) 249-8981
  • Aliso Viejo, CA
  • Marina del Rey, CA
  • 555 Gayley Ave, Los Angeles, CA 90024
  • Orange, CA

Work

Company: Newport media Mar 2006 Position: Principal vlsi design engineer

Education

Degree: MBA School / High School: University of California, Los Angeles - The Anderson School of Management 2010 to 2013

Skills

Semiconductors • Cross Functional Team Leadership • Strategy • Embedded Systems • Start Ups • Wireless • Ic • Soc • Mobile Devices • Digital Signal Processors • Vlsi • Asic • Entrepreneurship • Public Speaking

Industries

Semiconductors

Specialities

Employment • Labor • Education • Health Law • Administration Law

Professional Records

Lawyers & Attorneys

James Carwana Photo 1

James Carwana - Lawyer

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Specialties:
Employment
Labor
Education
Health Law
Administration Law
ISLN:
908497018
Admitted:
1982
University:
University of Toronto, B.A., 1977
Law School:
University of Toronto, LL.B., 1980

Resumes

Resumes

James Carwana Photo 2

Vice President And General Manager, Intel Sports

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Location:
19750 northwest Phillips Rd, Hillsboro, OR 97124
Industry:
Semiconductors
Work:
Newport Media since Mar 2006
Principal VLSI Design Engineer
Lockheed Martin Jun 2005 - Sep 2005
College Student Technical Senior Specialist
Education:
University of California, Los Angeles - The Anderson School of Management 2010 - 2013
MBA University of California, Los Angeles 2004 - 2006
MS, Electrical Engineering University of California, Los Angeles 1999 - 2004
BS, Electrical Engineering
Skills:
Semiconductors
Cross Functional Team Leadership
Strategy
Embedded Systems
Start Ups
Wireless
Ic
Soc
Mobile Devices
Digital Signal Processors
Vlsi
Asic
Entrepreneurship
Public Speaking

Publications

Us Patents

Low Power, Multi-Chip Diversity Architecture

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US Patent:
8594256, Nov 26, 2013
Filed:
Sep 14, 2010
Appl. No.:
12/882174
Inventors:
James Carwana - Aliso Viejo CA, US
Chaoliang T. Chen - Irvine CA, US
Tracy Denk - Aliso Viejo CA, US
Assignee:
Newport Media, Inc. - Lake Forest CA
International Classification:
H04B 7/10
H04L 1/02
US Classification:
375347, 375267, 375339
Abstract:
A multi-chip antenna diversity architecture includes a first receiver chip including a first tuner, and a first demodulator directly connected to the tuner. The first demodulator demodulates the first input signal received from the first tuner. A first power sequencer that controls the first receiver chip, and a first chip ID including a voltage source Vthat indicates the first receiver chip as a slave chip. A second receiver chip includes a second tuner, and a second demodulator directly connected to the second tuner. The second demodulator demodulates the second input signal received from the second tuner. A second diversity combiner directly connected to the second demodulator. A second chip ID includes a voltage source Vthat indicates the second receiver chip as a master chip. A Diversity State Machine (DSM) controls an operating state of the first receiver chip and the second receiver chip that are structurally identical.

Multi-Chip Antenna Diversity Picture-In-Picture Architecture

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US Patent:
20120081608, Apr 5, 2012
Filed:
Sep 30, 2010
Appl. No.:
12/894789
Inventors:
James Carwana - Aliso Viejo CA, US
Jun Tang - Lake Forest CA, US
Philip Treigherman - Newport Beach CA, US
Chaoliang T. Chen - Irvine CA, US
Tracy Denk - Aliso Viejo CA, US
Assignee:
NEWPORT MEDIA, INC. - Lake Forest CA
International Classification:
H04B 1/06
H04N 5/44
H03D 3/24
H04L 27/06
H04N 5/45
US Classification:
348565, 455269, 375340, 348E05096, 348E05112
Abstract:
A multi-chip antenna diversity architecture and method includes a first receiver chip that receives a first input signal from a first antenna. The first receiver chip includes a first tuner that amplifies the first input signal, a crystal operatively connected to a first crystal oscillator circuit, and a first crystal oscillator clock buffer that receives a clock signal from the first crystal oscillator circuit. A first demodulator demodulates the input signal received from the first tuner. A second receiver chip receives a second input signal from a second antenna. The second receiver chip includes a second crystal oscillator circuit, a second crystal oscillator clock buffer, a second tuner, and a second demodulator that receives diversity data from the first demodulator. The first crystal oscillator clock buffer drives the clock signal to the second crystal oscillator clock buffer, the second tuner, and the second demodulator of the second receiver chip.

Low Power, Multi-Chip Diversity Architecture

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US Patent:
20130251072, Sep 26, 2013
Filed:
May 21, 2013
Appl. No.:
13/899388
Inventors:
James Carwana - Aliso Viejo CA, US
Chaoliang T. Chen - Tustin CA, US
Tracy Denk - Aliso Viejo CA, US
Assignee:
Newport Media, Inc. - Lake Forest CA
International Classification:
H04B 7/08
US Classification:
375340
Abstract:
A multi-chip antenna diversity architecture includes a first receiver chip including a first tuner, and a first demodulator directly connected to the tuner. The first demodulator demodulates the first input signal received from the first tuner. A first power sequencer that controls the first receiver chip, and a first chip ID including a voltage source Vthat indicates the first receiver chip as a slave chip. A second receiver chip includes a second tuner, and a second demodulator directly connected to the second tuner. The second demodulator demodulates the second input signal received from the second tuner. A second diversity combiner directly connected to the second demodulator. A second chip ID includes a voltage source Vthat indicates the second receiver chip as a master chip. A Diversity State Machine (DSM) controls an operating state of the first receiver chip and the second receiver chip that are structurally identical.

Multi-Chip Antenna Diversity Picture-In-Picture Architecture

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US Patent:
20130271662, Oct 17, 2013
Filed:
May 21, 2013
Appl. No.:
13/899311
Inventors:
James Carwana - Aliso Viejo CA, US
Jun Tang - Irvine CA, US
Philip Treigherman - Newport Beach CA, US
Chaoliang T. Chen - Tustin CA, US
Tracy Denk - Aliso Viejo CA, US
Assignee:
NEWPORT MEDIA, INC. - Lake Forest CA
International Classification:
H04N 5/45
US Classification:
348565
Abstract:
A multi-chip antenna diversity architecture and method includes a first receiver chip that receives a first input signal from a first antenna. The first receiver chip includes a first tuner that amplifies the first input signal, a crystal operatively connected to a first crystal oscillator circuit, and a first crystal oscillator clock buffer that receives a clock signal from the first crystal oscillator circuit. A first demodulator demodulates the input signal received from the first tuner. A second receiver chip receives a second input signal from a second antenna. The second receiver chip includes a second crystal oscillator circuit, a second crystal oscillator clock buffer, a second tuner, and a second demodulator that receives diversity data from the first demodulator. The first crystal oscillator clock buffer drives the clock signal to the second crystal oscillator clock buffer, the second tuner, and the second demodulator of the second receiver chip.

Amazon

Ontario Supreme and District Court Practice 1988

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Author

Garry D.; McGowan, Michael; McGaw, Mark C. and Carwana, James P. Watson

Binding

Hardcover

Publisher

Carswell

ISBN #

0459305913

EAN Code

9780459305918

ISBN #

1

Control profile
James M Carwana from San Jose, CA, age ~43 Get Report