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Iraj Eric Shahvandi

from Austin, TX
Age ~73
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Also known as:
Iraj E Shahvandi, Iraj Fred Shahvandi, Iraj F Shahvandi, Eric Shahvandi, Iraj Shavandi, Iraj Erik I, Iraj Shahvanci, Iraj I
Related to:
Nina ShahvandiKatie Shahvandi, 29Mandi Shahvandi, 39
Connected to:
Shideh Shahvarian, 59Lior I Shahverdi, 33Ahmed M Shahwan, 69Isam H Shahwan, 66Khaled W Shahwan, 60Majida Shahwan, 46Aamir Shahzad, 41Chaudary M Shahzad, 58Faiza Shahzad, 64Humera F Shahzad, 50

Iraj Shahvandi Phones & Addresses

  • Austin, TX
  • Gatesville, TX
  • 201 Glenn Dr, Round Rock, TX 78664 (512) 671-7337 (512) 733-7588
  • Cedar Park, TX
  • Chandler, AZ
  • Apopka, FL
  • 1007 Williams Way, Cedar Park, TX 78613 (512) 635-9511

Work

Position: Production Occupations

Education

Degree: High school graduate or higher

Professional Records

License Records

Iraj E Shahvandi

Address:
9900 Gray Blvd, Austin, TX 78758
Phone:
(512) 410-4807
License #:
29450 - Active
Category:
A/C Contractor
Expiration Date:
Aug 30, 2017
Organization:
CENTRAL TEXAS A/C & REFRIGERATION SVCS.

Business Records

Name / Title
Company / Classification
Phones & Addresses
Iraj Eric Shahvandi
Director
CENTRAL TEXAS HVAC AND REFRIGERATION SCHOOL LLC
9900 Gray Blvd, Austin, TX 78758

Publications

Us Patents

Plasma-Enhanced Chemical Vapor Deposition (Cvd) Method To Fill A Trench In A Semiconductor Substrate

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US Patent:
6362098, Mar 26, 2002
Filed:
Feb 28, 2001
Appl. No.:
09/794999
Inventors:
Terry Alan Breeden - Cedar Creek TX
Iraj Eric Shahvandi - Round Rock TX
Michael Thomas Tucker - McKinney TX
Olivier Gerard Marc Vatel - Round Rock TX
Karl Emerson Mautz - Austin TX
Ralf Zedlitz - Dresden, DE
Assignee:
Motorola, Inc. - Schaumburg IL
Semiconductor 300 GmbH Co. KG - Dresden
Infineon Technologies AG - Munich
International Classification:
H01L 2144
US Classification:
438680, 438637
Abstract:
In a CVD chamber ( ) having a chuck ( ) to hold a semiconductor substrate ( ) and having a plasma generator ( ) to generate a plasma ( ), a trench in the substrate is filled with dielectric material from ions ( ) of the plasma. The ions are forced to move in a direction ( ) that is substantially perpendicular to the surface of the substrate by a pulsed unidirectional voltage between the plasma generator and the substrate, by a circular magnetic field, or by a combination of both fields.

Method For Removing Particles From A Semiconductor Processing Tool

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US Patent:
6786222, Sep 7, 2004
Filed:
Oct 25, 2002
Appl. No.:
10/280629
Inventors:
Larry E. Frisa - Meiningen, DE
Scott S. Kellogg - San Antonio TX
Grant W. McEwan - Austin TX
Michael N. Montgomery - Round Rock TX
Iraj Eric Shahvandi - Round Rock TX
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
B08B 600
US Classification:
134 13, 134 1, 134 6, 134 37, 134902, 15 152
Abstract:
A method for removing particles from a semiconductor processing tool is provided. The method comprises providing a pick-up wafer for picking up particles from a semiconductor processing tool, inserting said pick-up wafer into said semiconductor processing tool and placing the pick-up wafer on a receiving member, applying an electrostatic charge to said pick-up wafer, leaving said pick-up wafer in said semiconductor processing tool for a predetermined dwell time; and removing said pick-up wafer from said semiconductor processing tool. Further, a method for processing semiconductor wafers is provided.

Wafer Handling Device And Method For Testing Wafers

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US Patent:
20030082031, May 1, 2003
Filed:
Oct 30, 2001
Appl. No.:
10/016638
Inventors:
Olivier Vatel - Round Rock TX, US
Iraj Shahvandi - Round Rock TX, US
Dirk Aderhold - Dresden, DE
Peggy John - Dresden, DE
Ralf Zedlitz - Dresden, DE
International Classification:
B65H001/00
US Classification:
414/222010
Abstract:
A wafer handling device comprises metrology equipment () for testing selected wafers as well as a stationary wafer storage system (). The stationary wafer storage system () has a buffer () to store wafers and a load-and-unload station () to transfer selected wafers between the buffer () and wafer transport means (). The wafer transport means are provided for transferring selected wafers between the load-and-unload station () and the metrology equipment ().

Method For Depositing Barrier Layers In An Opening

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US Patent:
20030203615, Oct 30, 2003
Filed:
Apr 25, 2002
Appl. No.:
10/132807
Inventors:
Dean Denning - Del Valle TX, US
Da Zhang - Austin TX, US
Christopher Prindle - Austin TX, US
Iraj Shahvandi - Round Rock TX, US
International Classification:
H01L021/4763
US Classification:
438/627000, 438/643000, 438/653000, 438/685000
Abstract:
A method for reducing the resistance within an opening, such as a via, in a dielectric () is described herein. A first barrier layer () is formed within the opening and the portion of the first barrier layer () at the bottom of the opening is removed, thereby exposing an underlying metal line (). Deposited within the opening over the first barrier layer () and in contact with a conductor (), a thin second barrier layer () forms a barrier between the conductor () and subsequently formed conductive material (and ) within the opening. Because the second barrier layer () is thin, resistance is minimized between the conductor () and the conductive material (and ). Additionally, if the opening is not aligned with the metal line (), the second barrier layer () prevents the conductive material (and ) from degrading an underlying dielectric () that may be present underneath the opening.

Plasma Etching Process

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US Patent:
54054915, Apr 11, 1995
Filed:
Mar 4, 1994
Appl. No.:
8/205449
Inventors:
Iraj E. Shahvandi - Round Rock TX
Carol Gelatos - Austin TX
Leroy Grant - Austin TX
Assignee:
Motorola Inc. - Schaumburg IL
International Classification:
H01L 21306
B44C 122
US Classification:
156643
Abstract:
A process for fabricating a semiconductor device is enhanced by providing a plasma etching process in which exposed metal surfaces within a plasma etching chamber (24) are protected by a ceramic layer (46). In the plasma etching process, a substrate (10) is placed on a platen (26) located within a plasma etching apparatus (22). A clamping device (40) secures the perimeter of the substrate (10) to the platen (26). The clamping device (40) includes a ceramic layer (46) overlying a metal base (44). When a plasma is ignited within the etching chamber (24), the ceramic layer (46) prevents physical contact of the plasma and the metal base (44) of the clamping device (40).

Process For Forming A Sputter Deposited Metal Film

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US Patent:
53586158, Oct 25, 1994
Filed:
Oct 4, 1993
Appl. No.:
8/140341
Inventors:
Leroy Grant - Austin TX
Robert Fiordalice - Austin TX
Iraj E. Shahvandi - Round Rock TX
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
C23C 1434
US Classification:
20419215
Abstract:
A metal deposition process in which a high-purity metal film (46) is sputter deposited within a sputtering system (10) having insitu passivated metal components. A sputtering target (14) is provided having a thin aluminum coating (44) overlying a refractory metal layer (42). During operation, the aluminum coating (44) is sputtered away from the target (14) and onto exposed metal surfaces within the vacuum chamber (20) of the sputter deposition system (10). Subsequently, a semiconductor substrate (38) is placed in the sputter deposition system (10) and a high-purity metal film (46) is deposited onto the semiconductor substrate (38). Because the insitu passivation process avoid the oxidation of the passivating aluminum, refractory metal sputtered away from the target (14) adheres to the passivating aluminum layer, and does not re-deposit onto the surface of the semiconductor substrate (38) during the sputter deposition process.
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Iraj Eric Shahvandi from Austin, TX, age ~73 Get Report