US Patent:
20140264569, Sep 18, 2014
Inventors:
- San Jose CA, US
Dean E. PROBST - West Jordan UT, US
Richard STOKES - Shavertown PA, US
Suku KIM - South Jordan UT, US
Jason HIGGS - Mountain Top PA, US
Fred SESSION - Sandy UT, US
Hui CHEN - South Jordan UT, US
Steven P. SAPP - Felton CA, US
Jayson PREECE - Riverton UT, US
Mark L. Rinehimer - Mountain Top PA, US
Assignee:
Fairchild Semiconductor Corporation - San Jose CA
International Classification:
H01L 29/78
H01L 21/02
H01L 29/06
Abstract:
In one general aspect, an apparatus can include a semiconductor region, and a trench defined within the semiconductor region. The trench can have a depth aligned along a vertical axis and have a length aligned along a longitudinal axis orthogonal to the vertical axis. The trench can have a first portion of the length included in a termination region of the semiconductor region and can have a second portion of the length included in an active region of the semiconductor region.