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Hiroaki Yoshida Phones & Addresses

  • Cupertino, CA
  • Sunnyvale, CA
  • Campbell, CA

Resumes

Resumes

Hiroaki Yoshida Photo 1

Hiroaki Yoshida

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Location:
Sunnyvale, CA
Hiroaki Yoshida Photo 2

Senior Researcher

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Location:
Sunnyvale, CA
Industry:
Research
Work:
Fujitsu
Senior Researcher

The University of Tokyo Apr 2007 - Mar 2012
Project Assistant Professor

Zenasis Technologies Apr 2002 - Jun 2006
Senior Software Engineer
Education:
The University of Tokyo 2002 - 2007
Doctorates, Doctor of Philosophy, Engineering, Philosophy
The University of Tokyo 2000 - 2002
Master of Science, Masters, Engineering
The University of Tokyo 1996 - 2000
Bachelors, Bachelor of Science, Engineering
Skills:
Algorithms
Eda
C++
Software Development
C
Linux
Asic
Verilog
Tcl
Python
Ruby
Embedded Systems
Languages:
Japanese
English
Hiroaki Yoshida Photo 3

Hiroaki Yoshida

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Business Records

Name / Title
Company / Classification
Phones & Addresses
Hiroaki Yoshida
Director, President, Secretary, Treasurer
American Star Investers Group Inc

Publications

Us Patents

Interactive Software Program Repair

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US Patent:
20190042398, Feb 7, 2019
Filed:
Aug 3, 2017
Appl. No.:
15/668065
Inventors:
- Kawasaki-shi, JP
Hiroaki YOSHIDA - Cupertino CA, US
Ripon K. SAHA - Santa Clara CA, US
Indradeep GHOSH - Cupertino CA, US
Assignee:
FUJITSU LIMITED - Kawasaki-shi
International Classification:
G06F 11/36
Abstract:
In some examples, a method to interactively repair a software program using one or more automatically generated tests with human-provided test oracles may include identifying a fault location in a software program, generating a potential repair at the fault location based on a repair candidate, automatically generating a first test to test the potential repair, and generating a first query for a first test oracle based on the first test. The method may also include obtaining a response to the first query from a human, generating a first human-provided test oracle based on the first query and the obtained response to the first query, augmenting a test suite to include the first automatically generated test with the first human-provided test oracle, and testing the potential repair using the augmented test suite including the first automatically generated test with the first human-provided test oracle.

Method Invocation Synthesis For Software Program Repair

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US Patent:
20180239687, Aug 23, 2018
Filed:
Feb 17, 2017
Appl. No.:
15/436595
Inventors:
- Kawasaki-shi, JP
Mukul R. PRASAD - San Jose CA, US
Hiroaki YOSHIDA - Cupertino CA, US
Assignee:
FUJITSU LIMITED - Kawasaki-shi
International Classification:
G06F 11/36
Abstract:
A method may include obtaining a plurality of synthesized method invocations using a plurality of objects and a plurality of methods of a software program. The method may also include determining a prioritization of the plurality of synthesized method invocations based on one or more of: relationships between one or more characteristics of each of the plurality of synthesized method invocations and a fault location; and relationships between the one or more characteristics and an error report that corresponds to the fault location. The method may also include selecting a synthesized method invocation from the plurality of synthesized method invocations for repair operations with respect to the fault location based on a corresponding prioritization of the selected synthesized method invocation. In addition, the method may include performing repair operations with respect to the fault location and the selected synthesized method invocation.

Analytic Method And Analyzing Apparatus

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US Patent:
20170220450, Aug 3, 2017
Filed:
Jan 28, 2016
Appl. No.:
15/009268
Inventors:
- Kawasaki-shi, JP
Hiroaki Yoshida - Cupertino CA, US
Assignee:
FUJITSU LIMITED - Kawasaki
International Classification:
G06F 11/36
Abstract:
An analysis program recorded in a recording medium causes a computer to hold, when executing an intermediate code that is a compiled code in which an element in a source code is replaced with a metafunction that changes the element to a mutant, a set of mutation descriptors indicating a change in the mutant with respect to a mutation operation corresponding to the metafunction. The analysis program further causes the computer to evaluate a command of each of the mutation descriptors, select at least one mutation descriptor having a same command evaluation result from the set of the mutation descriptors, and calculate a direct product of the selected mutation descriptor and one of the mutation operation and a first state that is the set of the mutation descriptors before evaluation of the commands, thereby generating a second state. The analysis program further causes the computer to bundle, when evaluating a command of each mutation descriptor of the generated second state, if a plurality of the second states are present, the second states into a single group, evaluate commands of the second states in the group in parallel, and merge third states having the same evaluation result among third states that are based on the command evaluation results in the group.

Iterative Test Generation Based On Data Source Analysis

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US Patent:
20160292064, Oct 6, 2016
Filed:
Mar 30, 2015
Appl. No.:
14/673575
Inventors:
- Kawasaki-shi, JP
Hiroaki YOSHIDA - Cupertino CA, US
International Classification:
G06F 11/36
Abstract:
A method of testing a software program may include generating a test driver by assigning concrete values to input variables of a software program. The method may also include assigning symbolic source set elements to the input variables of the software program to generate a data structure based on the symbolic source set elements. The method may also include symbolically executing a current instruction of the software program based on the concrete values and symbolic source set elements assigned to the input variables of the software program and performing data source analysis on the current instruction of the software program based on symbolic execution of the current instruction.

Generation Of Software Test Code

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US Patent:
20160147633, May 26, 2016
Filed:
Nov 20, 2014
Appl. No.:
14/549516
Inventors:
- Kawasaki-shi, JP
Hiroaki YOSHIDA - Cupertino CA, US
International Classification:
G06F 11/36
G06F 9/44
Abstract:
A method may include detecting a change in a user repository that includes product code and test code. The product code and the test code may correspond to a software program. The change in the user repository may include a change in the product code with a corresponding changed portion of the product code. The method may also include generating, by a test tool, a test code update for the test code. The test code update may be generated based on detecting the change in the user repository and based on the changed portion of the product code. The method may further include communicating a pull request that requests that the user repository add the test code update to the user-managed repository.

System-On-Chip Design Structure

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US Patent:
20150339247, Nov 26, 2015
Filed:
Aug 3, 2015
Appl. No.:
14/817104
Inventors:
- Kawasaki-Shi, JP
Hiroaki YOSHIDA - Cupertino CA, US
Kodai MORITAKA - Ikoma-shi, JP
International Classification:
G06F 13/28
G06F 12/08
Abstract:
Aspects may include a method of designing a system-on-chip. The method may include receiving multiple processing modules, each representing in software one of multiple processing units of a system-on-chip. The method may further include modeling communications from one or more of the multiple processing modules as accesses to memory. The method may further include generating a coherent memory module associated with the multiple processing modules based on modeling the communications from the one or more of the multiple processing modules as accesses to memory. The coherent memory module may represent in software a coherent memory associated with the multiple processing units.

Software Verification

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US Patent:
20150331787, Nov 19, 2015
Filed:
May 15, 2014
Appl. No.:
14/278926
Inventors:
- Kawasaki-shi, JP
Hiroaki YOSHIDA - Cupertino CA, US
Assignee:
FUJITSU LIMITED - Kawasaki-shi
International Classification:
G06F 11/36
Abstract:
A method of verifying software may include receiving a portion of a software program that includes multiple functions. The method may also include clustering the functions into two or more clusters of functions and generating a symbolic driver for each of the clusters of functions such that multiple symbolic drivers are generated. The clusters of functions may be symbolically executed using the symbolic drivers to generate concrete test cases for the functions in the clusters. In response to the coverage of the symbolic execution of the clusters of functions being less than a particular coverage or a number of the concrete test cases being more than a particular number of concrete test cases, the method may include re-clustering the functions.

Test Double Generation

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US Patent:
20150220424, Aug 6, 2015
Filed:
Jan 31, 2014
Appl. No.:
14/170208
Inventors:
- Kawasaki-shi, JP
Hiroaki YOSHIDA - Cupertino CA, US
Assignee:
FUJITSU LIMITED - Kawasaki-shi
International Classification:
G06F 11/36
Abstract:
A method to generate test double proxies for callee functions of a function under test may include generating an initial set of test double proxies with abstract test stubs for all callee functions called by the function under test. Each of the test double proxies in the initial set of test double proxies may correspond to a different one of the callee functions. The method may also include generating a first refined set of test double proxies that includes a first refined test stub instead of a first one of the abstract test stubs for a first test double proxy in the initial set of test double proxies in response to determining that refining the first one of the abstract test stubs improves a test coverage of the function under test.
Hiroaki Yoshida from Cupertino, CA, age ~48 Get Report