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Hieu T Pham

from Santa Clara, CA
Age ~52
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Also known as:
Hieu Trung Pham, Hieu Hieu Pham, Hieu Tpham
Phone and address:
3516 Eastin Pl, Santa Clara, CA 95051
Related to:
Nancy T Pham, 58Trang T Nguyen, 56Thinh P Pham, 51Thang C Pham, 56Hiep V Pham, 61Cherry J Peleo, 36Jimmy PhamOanh T Pham, 52Ngoc Pham Tu, 55Linh Pham, 71Linda T Pham, 39Cuong Pham, 52
Connected to:
Aaron C Pham, 48Alex Pham, 56Alexander Pham, 37Alfred P Pham, 34Anh B Pham, 59Anhtuan Pham, 56Annie T Pham, 52Athena Y Pham, 28Austin Pham, 29Bee C Pham, 64

Hieu Pham Phones & Addresses

  • 3516 Eastin Pl, Santa Clara, CA 95051
  • 1050 Glenfinnan Ct, San Jose, CA 95122
  • 1773 Crater Lake Ave, Milpitas, CA 95035
  • Greensboro, NC
  • Mountain View, CA
  • Sunnyvale, CA

Professional Records

Medicine Doctors

Hieu Pham Photo 1

Dr. Hieu D Pham, San Francisco CA - MD (Doctor of Medicine)

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Specialties:
Oral & Maxillofacial Surgery
Address:
UCSF Oral/Maxillofacial Sgy
707 Parnassus Ave Suite D1201, San Francisco, CA 94143
(415) 476-1316 (Phone)
Languages:
English
Hospitals:
UCSF Oral/Maxillofacial Sgy
707 Parnassus Ave Suite D1201, San Francisco, CA 94143

San Francisco General Hospital
1001 Potrero Avenue, San Francisco, CA 94110

UCSF Medical Center
505 Parnassus Avenue, San Francisco, CA 94143

UCSF Medical Center at Mount Zion
1600 Divisadero Street, San Francisco, CA 94115
Education:
Medical School
University of California At San Francisco
Hieu Pham Photo 2

Dr. Hieu T Nguyen Pham, Sunnyvale CA - DDS (Doctor of Dental Surgery)

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Specialties:
Dentistry
Address:
942 Fairwood Ave, Sunnyvale, CA 94089
Languages:
English
Hieu Pham Photo 3

Hieu H. Pham

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Specialties:
Anesthesiology
Work:
Medical Anesthesia GroupMedical Anesthesia Group PA
1755 Kirby Pkwy STE 330, Memphis, TN 38120
(901) 725-5846 (phone), (901) 726-4827 (fax)
Education:
Medical School
University of Tennessee College of Medicine at Memphis
Graduated: 1993
Languages:
English
Description:
Dr. Pham graduated from the University of Tennessee College of Medicine at Memphis in 1993. He works in Memphis, TN and specializes in Anesthesiology. Dr. Pham is affiliated with Methodist Hospital South and Methodist University Hospital.

License Records

Hieu T. Pham

License #:
PNT.045661 - Expired
Issued Date:
Aug 6, 2008
Expiration Date:
Oct 3, 2011
Type:
Pharmacy Intern

Hieu T. Pham

License #:
PST.019625 - Active
Issued Date:
Oct 3, 2011
Expiration Date:
Dec 31, 2017
Type:
Pharmacist

Hieu C Pham

License #:
E016429 - Expired
Category:
Emergency medical services
Issued Date:
Dec 9, 2008
Expiration Date:
Sep 30, 2010
Type:
Alameda County EMS Agency

Hieu T Pham

Address:
PO Box 610605, San Jose, CA
12050 Park Blvd APT 195, Seminole, FL
Phone:
(727) 238-7530
License #:
26232
Category:
Health Care
Issued Date:
Dec 7, 2009
Effective Date:
Dec 7, 2009
Type:
Pharmacist Intern

Business Records

Name / Title
Company / Classification
Phones & Addresses
Hieu Pham
Executive
Hieu Pham
Travel Agencies
1050 Glenfinnan Ct, San Jose, CA 95122
Hieu Pham
Doctor Of Dental Surgery
Northern CA Comprehensive
Offices and Clinics of Doctors of Medicine
400 Parnassus Ave # 889, San Francisco, CA 94143
Hieu Pham
President, Family And General Dentistry
Hieu Pham DDS MD
Dental Surgeon
990 W Fremont Ave, Sunnyvale, CA 94087
(408) 738-3930
Hieu Pham
Pham, Dr. Hieu D
Oral Surgeons
990 W Fremont Ave, Sunnyvale, CA 94087
(408) 738-3930
Hieu Pham
President
SILICON FIELD SERVICE, INC
298 S Sunnyvale Ave #105, Sunnyvale, CA 94086
Hieu Pham
Executive
Hieu Pham
Travel Agencies
1050 Glenfinnan Ct, San Jose, CA 95122
Hieu Pham
Doctor Of Dental Surgery
Northern CA Comprehensive
Offices and Clinics of Doctors of Medicine
400 Parnassus Ave # 889, San Francisco, CA 94143

Publications

Us Patents

Ultra Low Deposition Rate Pecvd Silicon Nitride

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US Patent:
6686232, Feb 3, 2004
Filed:
Jun 19, 2002
Appl. No.:
10/173717
Inventors:
Minh Van Ngo - Fremont CA
Robert A. Huertas - Hollister CA
Dawn Hopper - San Jose CA
Hieu Pham - Milpitas CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L 21471
US Classification:
438197, 438763, 438787, 438792
Abstract:
A thin silicon nitride layer is deposited at an ultra low deposition rate by PECVD by reducing the NH flow rate and/or reducing the SiH flow rate. Embodiments include depositing a thin layer of silicon nitride, e. g. , 100 or less, on a thin silicon oxide liner over a gate electrode, at an NH flow rate of 100 to 800 sccm, a SiH flow rate of 50 to 100 sccm and a reduced pressure of 0. 8 to 1. 8 Torr. Embodiments of the present invention further include depositing the silicon nitride layer in multiple deposition stages, e. g. , depositing the silicon nitride layer in five deposition stages of 20 each.

Method Of Forming Copper Sulfide For Memory Cell

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US Patent:
6746971, Jun 8, 2004
Filed:
Dec 5, 2002
Appl. No.:
10/314060
Inventors:
Minh Van Ngo - Fremont CA
Sergey D. Lopatin - Santa Clara CA
Suzette K. Pangrle - Cupertino CA
Nicholas H. Tripsas - San Jose CA
Hieu T. Pham - Milpitas CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L 2131
US Classification:
438780, 438 72, 438 92, 438 94, 438 95, 438781, 438782, 438678
Abstract:
An organic memory cell made of two electrodes with a controllably conductive media between the two electrodes is disclosed. The controllably conductive media contains an organic semiconductor layer and passive layer. The controllably conductive media changes its impedance when an external stimuli such as an applied electric field is imposed thereon. Methods of making the organic memory devices/cells, methods of using the organic memory devices/cells, and devices such as computers containing the organic memory devices/cells are also disclosed.

Multi-Stage, Low Deposition Rate Pecvd Oxide

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US Patent:
6809043, Oct 26, 2004
Filed:
Jun 19, 2002
Appl. No.:
10/173611
Inventors:
Minh Van Ngo - Fremont CA
Robert A. Huertas - Hollister CA
Hieu Pham - Milpitas CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L 2131
US Classification:
438788, 438787
Abstract:
A silicon oxide layer is deposited at a thickness of about 50 or less by a multi-stage method comprising depositing a sub-layer of silicon oxide in each stage by PECVD at a low deposition rate. Embodiments include depositing a silicon dioxide liner over a gate electrode in at least four stages, each stage comprising depositing a sub-layer at a thickness of 10 or less.

Method Of Treating Inlaid Copper For Improved Capping Layer Adhesion Without Damaging Porous Low-K Materials

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US Patent:
6875694, Apr 5, 2005
Filed:
Feb 10, 2004
Appl. No.:
10/774418
Inventors:
Minh Van Ngo - Fremont CA, US
Robert Huertas - Hollister CA, US
Hieu Pham - Milpitas CA, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L021/44
US Classification:
438687, 438622, 438624, 438631, 438637, 438645
Abstract:
An exposed surface of inlaid Cu is plasma treated for improved capping layer adhesion while controlling plasma conditions to avoid damaging porous low-k materials. Embodiments include forming a dual damascene opening in a porous dielectric material having a dielectric constant (k) of up to 2. 4, e. g. , 2. 0 to 2. 2, filling the opening with Cu, conducting CMP, plasma treating the exposed Cu surface in NHor Hat a low power, e. g. , 75 to 125 watts, for a short period of time, e. g. , 2 to 8 seconds, without etching the porous low-k material and depositing a capping layer, e. g. , silicon nitride or silicon carbide.

Method For Manufacturing A Semiconductor Component That Inhibits Formation Of Wormholes

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US Patent:
7217660, May 15, 2007
Filed:
Apr 19, 2005
Appl. No.:
11/109964
Inventors:
Connie Pin-Chin Wang - Mountain View CA, US
Paul R. Besser - Sunnyvale CA, US
Jinsong Yin - Sunnyvale CA, US
Hieu T. Pham - Milpitas CA, US
Minh Van Ngo - Fremont CA, US
Assignee:
Spansion LLC - Sunnyvale CA
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L 21/22
US Classification:
438685, 438700
Abstract:
A method for manufacturing a semiconductor component that inhibits formation of wormholes in a semiconductor substrate. A contact opening is formed in a dielectric layer disposed on a semiconductor substrate. The contact opening exposes a portion of the semiconductor substrate. A sacrificial layer of oxide is formed on the exposed portion of the semiconductor substrate and along the sidewalls of the contact opening. Silane is reacted with tungsten hexafluoride to form a hydrofluoric acid vapor and tungsten. The hydrofluoric acid vapor etches away the sacrificial oxide layer and a thin layer of tungsten is formed on the exposed portion of the semiconductor substrate. After forming the thin layer of tungsten, the reactants may be changed to more quickly fill the contact opening with tungsten.

Void Free Interlayer Dielectric

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US Patent:
7307027, Dec 11, 2007
Filed:
Aug 11, 2005
Appl. No.:
11/201378
Inventors:
Minh Van Ngo - Fremont CA, US
Alexander Nickel - Santa Clara CA, US
Hieu Pham - Milpitas CA, US
Jean Yang - Sunnyvale CA, US
Hirokazu Tokuno - Cupertino CA, US
Weidong Qian - Sunnyvale CA, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
Spansion LLC - Sunnyvale CA
International Classification:
H01L 21/31
US Classification:
438778, 438593, 438257, 438211, 438201, 257E21679
Abstract:
A method of forming a dielectric between memory cells in a device includes forming multiple memory cells, where a gap is formed between each of the multiple memory cells. The method further includes performing a high density plasma deposition (HDP) process to fill at least a portion of the gap between each of the multiple memory cells with a dielectric material.

Semiconductor Devices With Copper Interconnects And Composite Silicon Nitride Capping Layers

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US Patent:
7534732, May 19, 2009
Filed:
Feb 17, 2006
Appl. No.:
11/356311
Inventors:
Minh Van Ngo - Fremont CA, US
Erik Wilson - Santa Clara CA, US
Hieu Pham - Milpitas CA, US
Robert Huertas - Hollister CA, US
Lu You - San Jose CA, US
Hirokazu Tokuno - Cupertino CA, US
Alexander Nickel - Santa Clara CA, US
Minh Tran - Milpitas CA, US
Assignee:
Spansion LLC - Sunnyvale CA
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L 21/4763
H01L 21/44
H01L 21/31
US Classification:
438792, 438630, 438655, 438682, 257E21293, 257E21302
Abstract:
Cu interconnects are formed with composite capping layers for reduced electromigration, improved adhesion between Cu and the capping layer, and reduced charge loss in associated non-volatile transistors. Embodiments include depositing a first relatively thin silicon nitride layer having a relatively high concentration of Si—H bonds on the upper surface of a layer of Cu for improved adhesion and reduced electromigration, and depositing a second relatively thick silicon nitride layer having a relatively low concentration of Si—H bonds on the first silicon nitride layer for reduced charge loss.

Gap-Filling With Uniform Properties

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US Patent:
7884030, Feb 8, 2011
Filed:
Apr 21, 2006
Appl. No.:
11/408086
Inventors:
Alexander Nickel - Santa Clara CA, US
Lu You - San Jose CA, US
Hirokazu Tokuno - Cupertino CA, US
Minh Tran - Milpitas CA, US
Minh Van Ngo - Fremont CA, US
Hieu Pham - Milpitas CA, US
Erik Wilson - Santa Clara CA, US
Robert Huertas - Hollister CA, US
Assignee:
Advanced Micro Devices, Inc. and Spansion LLC - Sunnyvale CA
International Classification:
H01L 21/31
H01L 21/469
H01L 23/58
US Classification:
438761, 257634, 257E21247, 257E23118
Abstract:
During semiconductor fabrication homogeneous gap-filling is achieved by depositing a thin dielectric layer into the gap, post deposition curing, and then repeating deposition and post deposition curing until gap-filling is completed. Embodiments include depositing a layer of low deposition temperature gap-fill dielectric into a high aspect ratio opening, such as a shallow trench or a gap between closely spaced apart gate electrode structures, as at a thickness of about 10 Å to about 500 Å, curing after deposition, as by UV radiation or by heating at a temperature of about 400 C. to about 1000 C. , depositing another layer of low deposition temperature gap-filled dielectric, and curing after deposition. Embodiments include separately depositing and separately curing multiple layers.

Amazon

This Is Not Available 046963

This is not available 046963

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This book is not available.
Author

Hieu T Pham

Binding

Paperback

Pages

210

Publisher

ProQuest, UMI Dissertation Publishing

ISBN #

1244649465

EAN Code

9781244649460

ISBN #

8

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Hieu T Pham from Santa Clara, CA, age ~52 Get Report