Inventors:
Harshawardhan Vipat - San Jose CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 15/16
US Classification:
709238, 709232, 709236, 709237, 709239, 709242, 709243, 709245, 709247, 709249, 711202, 711206, 711207, 3703955, 370409, 370470, 370471
Abstract:
Techniques to store entries so that minimal sequential memory accesses are used to determine all relevant entries. Entries may be grouped into blocks. The order of entries within blocks may be set in a manner so that entry locations can be determined using an input value, such as a destination address. Blocks may be ordered into levels. Blocks of each level may be stored in consecutive storage locations. Accordingly, entry locations may be determined and retrieved with minimal sequential memory accesses by storing entries in a predetermined manner.