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Harshawardhan An Vipat

from San Jose, CA
Age ~63

Harshawardhan Vipat Phones & Addresses

  • 1092 White Cliff Dr, San Jose, CA 95129
  • 419 Galleria Dr, San Jose, CA 95134 (408) 435-7440
  • 419 Galleria Dr #1, San Jose, CA 95134 (408) 435-7440
  • Santa Clara, CA
  • Tempe, AZ

Publications

Us Patents

Symbolic Buffer Allocation In Local Cache At A Network Processing Element

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US Patent:
7140023, Nov 21, 2006
Filed:
Oct 31, 2003
Appl. No.:
10/699638
Inventors:
Dennis D. Tran - San Jose CA, US
Harshawardhan Vipat - San Jose CA, US
Uday R. Naik - Fremont CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 13/16
US Classification:
718108, 718105, 710 52, 711 5, 711170
Abstract:
According to some embodiments, a portion of local memory allocated to a thread by a programming statement includes an indication of a read/write status of the portion and symbolically references a buffer name wherein the symbolically referenced buffer name includes both letters and numbers.

Method And Apparatus To Improve Network Routing

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US Patent:
7257643, Aug 14, 2007
Filed:
May 16, 2002
Appl. No.:
10/150315
Inventors:
Philip P. Mathew - Santa Clara CA, US
Ranjeeta Singh - Sunnyvale CA, US
Michael R. Lewin - San Francisco CA, US
Harshawardhan Vipat - San Jose CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 15/16
G06F 9/26
G06F 12/00
H04L 12/56
H04J 3/22
G06F 15/173
G06F 9/34
H04L 12/28
H04J 3/16
H04J 3/24
US Classification:
709238, 709236, 709239, 709245, 709246, 711202, 711206, 711212, 711220, 3703953, 37039531, 37039532, 3703955, 370409, 370471
Abstract:
A method and apparatus to route information in a network is described. A technique is described to search for routine information that uses a first technique on at least a portion of a first value of a network address and a second technique on at least a portion of a second section of an address. In particular, the first value is associated with an aggregation identifier, and compared to a unique prefix. In this way, address identifiers may be generated, and this identifier is used to search for routing information.

Techniques To Manage A Flow Cache

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US Patent:
7555608, Jun 30, 2009
Filed:
Feb 13, 2006
Appl. No.:
11/353600
Inventors:
Uday Naik - Fremont CA, US
Alok Kumar - Santa Clara CA, US
Harshawardhan Vipat - San Jose CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/00
US Classification:
711133
Abstract:
Techniques are described herein that may be used to invalidate all entries in a table. For example, the table may be a flow cache. For example, an expiry time may be associated with one or more entries in the table. The expiry time of an entry may be initially set to the sum of the system time, the expiry time of the protocol associated with the entry, and a global time variable. To check if the entry is expired at any time, the current system time may be added to the global time variable and if the result is greater than the expiry time in the entry, then the entry is expired. To invalidate all the entries, the global time variable may be incremented by a large amount which may equal the maximum expiry time of all protocols. This may cause all entries to expire. New entries may be added using the new incremented value of the global time variable and will hence not expire.

Techniques For Entry Lookups

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US Patent:
7877504, Jan 25, 2011
Filed:
Aug 29, 2002
Appl. No.:
10/231542
Inventors:
Harshawardhan Vipat - San Jose CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 15/16
US Classification:
709238, 709232, 709236, 709237, 709239, 709242, 709243, 709245, 709247, 709249, 711202, 711206, 711207, 3703955, 370409, 370470, 370471
Abstract:
Techniques to store entries so that minimal sequential memory accesses are used to determine all relevant entries. Entries may be grouped into blocks. The order of entries within blocks may be set in a manner so that entry locations can be determined using an input value, such as a destination address. Blocks may be ordered into levels. Blocks of each level may be stored in consecutive storage locations. Accordingly, entry locations may be determined and retrieved with minimal sequential memory accesses by storing entries in a predetermined manner.

Method And Apparatus To Perform Network Routing Using Multiple Length Trie Blocks

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US Patent:
20040006639, Jan 8, 2004
Filed:
Jun 13, 2002
Appl. No.:
10/172522
Inventors:
Philip Mathew - Santa Clara CA, US
Ranjeeta Singh - Sunnyvale CA, US
Harshawardhan Vipat - San Jose CA, US
International Classification:
G06F015/173
US Classification:
709/238000
Abstract:
A method and apparatus to perform network routing using an improved routing table, search algorithm and update algorithm are described.

Regulating Access To And Protecting Portions Of Applications Of Virtual Machines

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US Patent:
20130125119, May 16, 2013
Filed:
Oct 16, 2012
Appl. No.:
13/653077
Inventors:
Harshawardhan Vipat - San Jose CA, US
Ravi L. Sahita - Portland OR, US
Roshni Chatterjee - Sunnyvale CA, US
Madhukar Tallam - Fremont CA, US
International Classification:
G06F 21/22
G06F 9/455
US Classification:
718 1
Abstract:
Embodiments of apparatus, computer-implemented methods, systems, and computer-readable media are described herein for a virtual machine manager, wherein the virtual machine manager is configured to selectively employ different views with different permissions to map guest physical memory of a virtual machine of the apparatus to host physical memory of the apparatus, to regulate access to and protect different portions of an application of the virtual machine that resides in different portions of the physical memory. Other embodiments may be described and/or claimed.

Method And System For Monitoring Calls To An Application Program Interface (Api) Function

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US Patent:
20130283370, Oct 24, 2013
Filed:
Dec 14, 2011
Appl. No.:
13/997739
Inventors:
Harshawardhan Vipat - San Jose CA, US
Ravi Sahita - Portland OR, US
International Classification:
G06F 21/44
US Classification:
726 17
Abstract:
A method and device for monitoring calls to an application program interface (API) function includes monitoring for a memory permission violation of a computing device caused by the API function call. If a memory permission violation occurs, control of the computing device is transferred to a virtual machine monitor to intervene prior to execution or the API function. The virtual machine monitor may perform one or more actions in response to the API function call.

Protecting Iat/Eat Hooks From Rootkit Attacks Using New Cpu Assists

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US Patent:
20140082751, Mar 20, 2014
Filed:
Sep 14, 2012
Appl. No.:
13/615928
Inventors:
HARSHAWARDHAN VIPAT - San Jose CA, US
RAVI L. SAHITA - Portland OR, US
International Classification:
G06F 21/62
G06F 21/52
US Classification:
726 30
Abstract:
The present disclosure provides systems and methods for hardware-enforced protection from malicious software. A device may include at least a security validator module and a security initiator module. A call from a process requesting access to information stored in the device may be redirected to the security initiator module, which may cause the device to change from an unsecured view to a secured view. In the secured view the security validator module may determine whether the call came from malicious software. If the call is determined to be valid, then access to the stored information may be permitted. If the call is determined to be invalid (e.g., from malware), the security software may cause the device to return to the unsecured view without allowing the stored information to be accessed, and may take further measures to identify and/or eliminate process code associated with the process that made the invalid call.
Harshawardhan An Vipat from San Jose, CA, age ~63 Get Report