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Haris Volos

from Menlo Park, CA
Age ~44
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Also known as:
Volos Haris
Connected to:
Jenna M Volos, 39Petru Volosen, 47Galina M Volosevich, 71Carol D Voloshen, 55Eleonor Voloshin, 65Galina M Voloshina, 65Gene Voloshin, 43Gene G Voloshko, 70Leo Voloshin, 42Valeriy P Voloshin, 77

Haris Volos Phones & Addresses

  • Menlo Park, CA
  • San Jose, CA
  • 1214 Spring St, Madison, WI 53715 (608) 256-1529

Resumes

Resumes

Haris Volos Photo 1

Assistant Professor

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Location:
208 Turner St northwest, Blacksburg, VA 24060
Industry:
Research
Work:
Hewlett-Packard Laboratories - Palo Alto since Feb 2013
Researcher
University of Wisconsin-Madison Jun 2006 - Dec 2012
Research Assistant
Intel Corporation May 2008 - Aug 2008
Graduate Technical Intern
Education:
University of Wisconsin-Madison 2007 - 2012
PhD, Computer Science University of Wisconsin-Madison 2005 - 2007
Master of Science (M.Sc.), Computer Science National Technical University of Athens 2000 - 2005
Diploma, Electrical and Computer Engineering
Skills:
Research
Haris Volos Photo 2

Senior Research Engineer

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Location:
San Francisco, CA
Industry:
Computer Networking
Work:
The University of Arizona - Tucson, Arizona Area since Aug 2012
Research Scientist
Virginia Tech Oct 2011 - Sep 2012
Research Scientist
Virginia Tech Sep 2010 - Oct 2011
Postdoctoral Associate
Virginia Tech 2005 - Nov 2010
Graduate Research Assistant
Education:
Virginia Polytechnic Institute and State University 2006 - 2010
Ph.D., Electrical Engineering
Skills:
Matlab
Signal Processing
Simulations
Algorithms
Cognitive Radio
C
Latex
Digital Signal Processors
Simulink
Machine Learning
C++
Programming
Python
Optimization
Research
Mathematical Modeling
Fpga
Labview
Image Processing
Digital Signal Processing
Artificial Intelligence
Mathcad
Ofdm
Software Development
Project Management
Rapid Prototyping
Software Defined Radio
Rf
Microsoft Office
Proposal Writing
Microcontrollers
Modeling
Radio Frequency
Tass Prescan
Interests:
Economic Empowerment
Education
Science and Technology
Human Rights
Health
Languages:
English
Greek
Certifications:
Leadership Excellence Certificate
Getting Things Done
Foundations of Layout and Composition
Foundations of Programming: Databases
Effective Design of Restful Apis
License 30A82D
License Fa0Bb8
License 3700Bd
License E5Fd50
Virginia Tech University Organizational and Professional Development
Lynda.com, License 30A82D
Lynda.com, License Fa0Bb8
Lynda.com, License 3700Bd
Lynda.com, License E5Fd50
Haris Volos Photo 3

Research Scientist At The University Of Arizona

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Position:
Research Scientist at The University of Arizona
Location:
Tucson, Arizona
Industry:
Telecommunications
Work:
The University of Arizona - Tucson, Arizona Area since Aug 2012
Research Scientist
Virginia Tech Oct 2011 - Sep 2012
Research Scientist
Virginia Tech Sep 2010 - Oct 2011
Postdoctoral Associate
Virginia Tech 2005 - Nov 2010
Graduate Research Assistant
Education:
Virginia Polytechnic Institute and State University 2006 - 2010
Ph.D., Electrical Engineering
Skills:
Cognitive Radio
Signal Processing
Matlab
Simulation
Algorithms
Simulations
MathCAD

Publications

Us Patents

Non-Broadcast Signature-Based Transactional Memory

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US Patent:
20090077329, Mar 19, 2009
Filed:
Jul 9, 2008
Appl. No.:
12/217811
Inventors:
David A. Wood - Madison WI, US
Mark D. Hill - Madison WI, US
Michael M. Swift - Madison WI, US
Michael R. Marty - Madison WI, US
Luke Yen - Fitchburg WI, US
Kevin E. Moore - Mill Valley CA, US
Jayaram Bobba - Madison WI, US
Haris Volos - Madison WI, US
International Classification:
G06F 12/00
US Classification:
711156, 711E12001
Abstract:
A coherence controller in hardware of an apparatus in an example detects conflicts on coherence requests through direct, non-broadcast employment of signatures that: summarize read-sets and write-sets of memory transactions; and provide false positives but no false negatives for the conflicts on the coherence requests. The signatures comprise fixed-size representations of a substantially arbitrary set of addresses for the read-sets and the write-sets of the memory transactions.

Methods And Systems For Transactional Nested Parallelism

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US Patent:
20100162247, Jun 24, 2010
Filed:
Dec 19, 2008
Appl. No.:
12/340374
Inventors:
Adam Welc - San Francisco CA, US
Haris Volos - Madison WI, US
Ali Adl-Tabatabai - San Jose CA, US
Tatiana Shpeisman - Menlo Park CA, US
International Classification:
G06F 9/46
US Classification:
718101
Abstract:
Methods and systems for executing nested concurrent threads of a transaction are presented. In one embodiment, in response to executing a parent transaction, a first group of one or more concurrent threads including a first thread is created. The first thread is associated with a transactional descriptor comprising a pointer to the parent transaction.

Roadside Computing System For Predicting Road User Trajectory And Assessing Travel Risk

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US Patent:
20210383686, Dec 9, 2021
Filed:
Mar 29, 2021
Appl. No.:
17/216254
Inventors:
- Southfield MI, US
Ravi AKELLA - San Jose CA, US
Haris VOLOS - Sunnyvale CA, US
Assignee:
DENSO International America, Inc. - Southfield MI
International Classification:
G08G 1/01
Abstract:
A roadside computing (RSC) system associated with a roadway obtains, a position of a connected road user. The RSC system is configured to identify at least one road user based on sensor data from one or more roadside sensors, determine a position of the at least one road user identified based on the sensor data, track by the RSC system, the position of the road user traveling on the roadway, determine a predicted trajectory of the road user based on the tracked position of the road user and a trajectory prediction model, and transmit information related to the predicted trajectory to the computing device associated with the connected road user.

Automatic Traffic Incident Detection And Reporting System

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US Patent:
20200027333, Jan 23, 2020
Filed:
Jul 17, 2018
Appl. No.:
16/037622
Inventors:
- Southfield MI, US
Ravi AKELLA - San Jose CA, US
Haris VOLOS - Sunnyvale CA, US
Takashi BANDO - Mountain View CA, US
International Classification:
G08B 25/00
G06T 7/292
G06T 7/70
G08G 1/16
G06K 9/00
H04W 4/44
H04L 29/08
Abstract:
An automatic traffic incident detection and reporting system for a vehicle may include at least one of a plurality of cameras and a plurality of proximity sensors, an incident determination unit, a remote vehicle position determination unit, and a communication unit. The incident determination unit is configured to receive signals from the at least one of the plurality of cameras and the plurality of proximity sensors, detect whether incident involving at least one remote vehicle has occurred, and categorize the incident. The remote vehicle position determination unit is configured to receive signals from the at least one of the plurality of cameras and the plurality of proximity sensors and determine a location of the incident. The communication unit is configured to transmit data related to the incident to at least one of a cloud server and an emergency service provider.

Ordering Updates For Nonvolatile Memory Accesses

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US Patent:
20190317891, Oct 17, 2019
Filed:
Jun 26, 2019
Appl. No.:
16/453784
Inventors:
- Houston TX, US
Haris Volos - Palo Alto CA, US
Kimberly Keeton - Palo Alto CA, US
International Classification:
G06F 12/02
G06F 12/0868
G06F 12/0804
Abstract:
Examples relate to ordering updates for nonvolatile memory accesses. In some examples, a first update that is propagated from a write-through processor cache of a processor is received by a write ordering buffer, where the first update is associated with a first epoch. The first update is stored in a first buffer entry of the write ordering buffer. At this stage, a second update that is propagated from the write-through processor cache is received, where the second update is associated with a second epoch. A second buffer entry of the write ordering buffer is allocated to store the second update. The first buffer entry and the second buffer entry can then be evicted to non-volatile memory in epoch order.

Allocate Memory Based On Memory Type Request

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US Patent:
20180357001, Dec 13, 2018
Filed:
Dec 16, 2015
Appl. No.:
16/061221
Inventors:
- Houston TX, US
Guilherme De Campos Magalhaes - Porto Alegre, BR
Ludmila Cherkasova - Sunnyvale CA, US
Haris Volos - Palo Alto CA, US
International Classification:
G06F 3/06
Abstract:
Techniques for allocating memory based on memory type request are provided. In one aspect, an application thread may be bound to a first processor. The first processor may be associated with a first memory. A portion of memory may be allocated from the first memory in response to the application thread requesting memory of a first type. A portion of memory from a second memory associated with a second processor may be allocated in response to the application thread requesting memory of a second type.

Invariant Determination

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US Patent:
20180314574, Nov 1, 2018
Filed:
Apr 28, 2017
Appl. No.:
15/581882
Inventors:
- Houston TX, US
James Park - Palo Alto CA, US
Haris Volos - Palo Alto CA, US
International Classification:
G06F 11/07
Abstract:
Examples disclosed herein relate to determining that an operation is accessing data on a persistent memory and retrieving a log of the operation. The examples may also include determining a type of the data being accessed by the persistent memory by the operation and identifying, from the log, a location in the persistent memory of the data accessed by the operation. The examples may also include determining contents of the data accessed by the persistent memory by the operation and determining whether the contents of the data hold an invariant corresponding to the type of data.

Persistent Ticket Operation

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US Patent:
20180095783, Apr 5, 2018
Filed:
Oct 25, 2016
Appl. No.:
15/333820
Inventors:
- Houston TX, US
Milind M. Chabbi - Palo Alto CA, US
Haris Volos - Palo Alto CA, US
International Classification:
G06F 9/46
G06F 9/30
Abstract:
In one example in accordance with the present disclosure, a method may include performing a transactional operation such that if one step of the transactional operation is performed, each other step of the transactional operation is performed. The transactional operation may include making a first copy, stored in a first persistent memory, of a next ticket number stored in a second persistent memory and updating the next ticket number in the second persistent memory. The method may also include determining when to serve a first thread based on the first copy of the next ticket number.
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Haris Volos from Menlo Park, CA, age ~44 Get Report