Gudbjorg Oskarsdottir

7170188, Jan 30, 2007

Jun 30, 2004

10/882783

Gudbjorg H. Oskarsdottir - Chandler AZ, US
Mitesh C. Patel - Phoenix AZ, US

Intel Corporation - Santa Clara CA

H01L 23/28

257787, 257789, 257790, 257778, 257738, 257E23119, 257E23126

Numerous embodiments of an apparatus and method to stress and warpage of semiconductor packages are described. In one embodiment, a semiconductor die is disposed above a substrate. An encapsulating material is disposed above the substrate and semiconductor die, in which the encapsulating material has a combination of a low coefficient of thermal expansion material and a high coefficient of thermal expansion material.

7179689, Feb 20, 2007

Nov 18, 2005

11/282255

Gudbjorg H. Oskarsdottir - Chandler AZ, US
Mitesh C. Patel - Phoenix AZ, US

Intel Corporation - Santa Clara CA

H01L 21/44
H01L 21/48
H01L 21/50

438127, 438124, 438126, 438108, 438118, 438613, 257E21502, 257E21503, 257E21499

Numerous embodiments of an apparatus and method to stress and warpage of semiconductor packages are described. In one embodiment, a semiconductor die is disposed above a substrate. An encapsulating material is disposed above the substrate and semiconductor die, in which the encapsulating material has a combination of a low coefficient of thermal expansion material and a high coefficient of thermal expansion material.

7205595, Apr 17, 2007

Mar 31, 2004

10/816259

Mukul P. Renavikar - Chandler AZ, US
Gudbjorg H. Oskarsdottir - Chandler AZ, US

Intel Corporation - Santa Clara CA

H01L 29/76
H01L 21/8242

257295, 257296, 257311, 257314, 257E21208, 438253, 438393, 438E21209

An embodiment of the invention reduces damage caused to a polymer ferroelectric layer in a polymer ferroelectric memory device by creating excess holes in the insulating metal nitride and/or metal oxide layers between the metal electrodes and polymer ferroelectric layer. The excess holes in the metal nitride and/or metal oxide trap electrons injected by the metal electrodes under AC bias that would otherwise damage the polymer ferroelectric layer.

7279362, Oct 9, 2007

Mar 31, 2005

11/097424

Eric J. Li - Chandler AZ, US
Daoqiang Lu - Chandler AZ, US
Christopher L. Rumer - Chandler AZ, US
Paul A. Koning - Chandler AZ, US
Darcy E. Fleming - Tempe AZ, US
Gudbjorg H. Oskarsdottir - Chandler AZ, US
Tiffany Byrne - Chandler AZ, US

Intel Corporation - Santa Clara CA

H01L 21/00

438114, 438115, 257E21508, 257E21599

Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.

7446360, Nov 4, 2008

Aug 9, 2004

10/914862

Gudbjorg H. Oskarsdottir - Chandler AZ, US

Intel Corporation - Santa Clara CA

H01L 35/24
H01L 29/76

257295, 257 40, 428421, 428422, 428463

According to one aspect of the invention, a polymer device and a method of constructing a polymer device are provided. The polymer device includes a first conductor, a second conductor, and a polymeric body between the first and second conductors. The polymeric body includes a polymer material and a phyllosilicate material.

7897486, Mar 1, 2011

May 9, 2007

11/801465

Eric J. Li - Chandler AZ, US
Daoqiang Lu - Chandler AZ, US
Christopher L. Rumer - Chandler AZ, US
Paul A. Koning - Chandler AZ, US
Darcy E. Fleming - Tempe AZ, US
Gudbjorg H. Oskarsdottir - Chandler AZ, US
Tiffany Byrne - Chandler AZ, US

Intel Corporation - Santa Clara CA

H01L 21/00

438463, 438460, 438758, 257762

Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.

8193072, Jun 5, 2012

Nov 2, 2010

12/938281

Eric J. Li - Chandler AZ, US
Daoqiang Lu - Chandler AZ, US
Christopher L. Rumer - Chandler AZ, US
Paul A. Koning - Chandler AZ, US
Darcy E. Fleming - Tempe AZ, US
Gudbjorg H. Oskarsdottir - Chandler AZ, US
Tiffany Byrne - Chandler AZ, US

Intel Corporation - Santa Clara CA

H01L 21/78

438462, 438461, 438460, 438463, 257E21559

Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.

20050139962, Jun 30, 2005

Dec 30, 2003

10/748446

Ashay Dani - Chandler AZ, US
Gudbjorg Oskarsdottir - Chandler AZ, US
Chris Matayabas - Chandler AZ, US
Sujit Sharan - Chandler AZ, US
Chris Rumer - Chandler AZ, US
Beverly Canham - Chandler AZ, US

H01L023/544

257620000

A silicon wafer has a plurality of integrated circuits terminated on a surface of the silicon wafer. The silicon wafer has a soluble protective coat on the surface of the silicon wafer. The coated silicon wafer may be processed by laser scribing. A solvent wash may be used to remove the soluble protective coat and debris from laser scribing. The coated silicon wafer may be saw cut after laser scribing. A flow of solvent may be provided during the saw cutting. The flow of solvent may be sufficient to remove at least a substantial portion of the soluble protective coat.