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Gregory Waters Phones & Addresses

  • 922 S 1100 W, Woods Cross, UT 84087 (801) 633-1609
  • Coalville, UT
  • Salt Lake City, UT
  • Dedham, MA
  • Cudahy, WI
  • 4979 Del Prado St, Salt Lake Cty, UT 84117

Work

Company: Engstrom, Lipscomb & Lack A Professional Corporation Address:

Specialities

General Practice • Civil Litigation • Civil Appeals • Complex Business Litigation • Products Liability

Professional Records

Medicine Doctors

Gregory Waters Photo 1

Gregory S. Waters

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Specialties:
General Surgery
Work:
Wake Forest University Baptist Medical Center Multi Specialty
Medical Ctr Blvd, Winston Salem, NC 27157
(336) 716-2011 (phone), (336) 716-7277 (fax)
Education:
Medical School
East Carolina University Brody School Medicine
Graduated: 1990
Procedures:
Colonoscopy
Destruction of Lesions on the Anus
Hemorrhoid Procedures
Pilonidal Cyst Excision
Proctosigmoidoscopy
Sigmoidoscopy
Small Bowel Resection
Hernia Repair
Laparoscopic Appendectomy
Laparoscopic Gallbladder Removal
Conditions:
Gastrointestinal Hemorrhage
Hemorrhoids
Malignant Neoplasm of Colon
Abdominal Hernia
Anal Fissure
Languages:
English
Spanish
Description:
Dr. Waters graduated from the East Carolina University Brody School Medicine in 1990. He works in Winston-Salem, NC and specializes in General Surgery. Dr. Waters is affiliated with Wake Forest Baptist Medical Center.
Gregory Waters Photo 2

Gregory J. Waters

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Specialties:
Anesthesiology
Work:
Anesthesia Medical ConsltntsAnesthesia Practice Consultants
100 Michigan St NE, Grand Rapids, MI 49503
(616) 364-4200 (phone), (616) 364-7347 (fax)
Education:
Medical School
Michigan State University College of Human Medicine
Graduated: 1978
Languages:
English
Description:
Dr. Waters graduated from the Michigan State University College of Human Medicine in 1978. He works in Grand Rapids, MI and specializes in Anesthesiology. Dr. Waters is affiliated with Butterworth Hospital, Metrohealth Hospital and Spectrum Health Blodgett Campus.

Lawyers & Attorneys

Gregory Waters Photo 3

Gregory Waters - Lawyer

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Office:
Engstrom, Lipscomb & Lack A Professional Corporation
Specialties:
General Practice
Civil Litigation
Civil Appeals
Complex Business Litigation
Products Liability
ISLN:
918075152
Admitted:
2005
University:
University of California, Berkeley, B.A., 1987; University of California, Berkeley, B.A., 1987
Law School:
University of Southern California, J.D., 2004

Business Records

Name / Title
Company / Classification
Phones & Addresses
Gregory L Waters
WATERS FAMILY LLC
Gregory L. Waters
General Manager
Skyworks USA, Inc
Short-Term Business Credit Institution
20 Sylvan Rd, Woburn, MA 01801
(781) 376-3000
Gregory J. Waters
IWD, INC
Gregory J. Waters
WINDOW MACHINERY, INC

Publications

Us Patents

Object-Aware Transport-Layer Network Processing Engine

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US Patent:
20040210663, Oct 21, 2004
Filed:
Apr 15, 2003
Appl. No.:
10/414406
Inventors:
Paul Phillips - Westboro MA, US
Stephen Metzger - Harvard MA, US
Brian Ramelson - Brighton MA, US
Thomas Levergood - Hopkinton MA, US
Daniel Lussier - Holliston MA, US
Gregory Waters - Groton MA, US
International Classification:
G06F015/16
US Classification:
709/230000
Abstract:
In one general aspect, a network communication unit is disclosed that includes connection servicing logic that is responsive to transport-layer headers and is operative to service virtual, error-free network connections. A programmable parser is responsive to the connection servicing logic and is operative to parse application-level information received by the connection servicing logic for at least a first of the connections. Also included is application processing logic that is responsive to the parser and operative to operate on information received through at least the first of the connections based on parsing results from the parser.

Object-Aware Transport-Layer Network Processing Engine

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US Patent:
20050060414, Mar 17, 2005
Filed:
Aug 9, 2004
Appl. No.:
10/914831
Inventors:
Paul Phillips - Westboro MA, US
Stephen Metzger - Harvard MA, US
Brian Ramelson - Brighton MA, US
Thomas Levergood - Hopkinton MA, US
Daniel Lussier - Holliston MA, US
Gregory Waters - Groton MA, US
Assignee:
SUN MICROSYSTEMS, INC. - Santa Clara CA
International Classification:
G06F015/16
US Classification:
709227000
Abstract:
In one general aspect, a network communication unit is disclosed that includes connection servicing logic that is responsive to transport-layer headers and is operative to service virtual, error-free network connections. A programmable parser is responsive to the connection servicing logic and is operative to parse application-level information received by the connection servicing logic for at least a first of the connections. Also included is application processing logic that is responsive to the parser and operative to operate on information received through at least the first of the connections based on parsing results from the parser.

Object-Aware Transport-Layer Network Processing Engine

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US Patent:
20050060427, Mar 17, 2005
Filed:
Aug 9, 2004
Appl. No.:
10/914830
Inventors:
Paul Phillips - Westboro MA, US
Stephen Metzger - Harvard MA, US
Brian Ramelson - Brighton MA, US
Thomas Levergood - Hopkinton MA, US
Daniel Lussier - Holliston MA, US
Gregory Waters - Groton MA, US
Assignee:
SUN MICROSYSTEMS, INC. - Santa Clara CA
International Classification:
G06F015/173
US Classification:
709238000
Abstract:
In one general aspect, a network communication unit is disclosed that includes connection servicing logic that is responsive to transport-layer headers and is operative to service virtual, error-free network connections. A programmable parser is responsive to the connection servicing logic and is operative to parse application-level information received by the connection servicing logic for at least a first of the connections. Also included is application processing logic that is responsive to the parser and operative to operate on information received through at least the first of the connections based on parsing results from the parser.

Apparatus For Supplying Channel-Control Signals And Maintenance Signals In A Serial Data Concentrator System

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US Patent:
49707183, Nov 13, 1990
Filed:
Mar 3, 1989
Appl. No.:
7/318606
Inventors:
Robert J. Simcoe - Westborough MA
Raymond G. Stephany - Ashland MA
Gregory M. Waters - Waltham MA
Assignee:
Digital Equipment Corporation - Maynard MA
International Classification:
H04J 300
H04B 1700
US Classification:
370 77
Abstract:
A data link (1000) multiplexes a large number of concurrently operating channel onto a single pair of fiber-optic cables (10 and 1010). A receiver (1004A) at one end of the links determines whether it is in sychronism with the signals that it receives over one of the cables (1010), and a transmitter (1002A) includes the result of that determination with the data that it sends to the other end if the link so that devices at the other end of the link can be caused to log off in response to extended lapses in synchronism at the first end. Each transmitter also sends an error count to the other end, and is responsive to a mode signal from the other end to reduce its signal power, so that maintenance personnel can perform many testing and diagnostic procedures from a single end of the link. A single integrated-circuit chip (1005A) receives data serially from a modularly expandable shift register (208) that has recieved the data in parallel, and the chip sends the data serially in a "reverse" order so that expansion of the shift-register length requires no change in the chip.

Technique For Organizing And Coding Serial Binary Data From A Plurality Of Data Lines For Transmission Over A Single Transmission Line

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US Patent:
50181424, May 21, 1991
Filed:
Jan 26, 1990
Appl. No.:
7/471209
Inventors:
Robert J. Simcoe - Westborough MA
Gregory M. Waters - Boston MA
Assignee:
Digital Equipment Corporation - Maynard MA
International Classification:
H04J 300
H04J 1408
US Classification:
370112
Abstract:
A digital communications system includes a transmitting section that receives electrical signals in parallel and transmits them serially by means of an optic fiber (10) to a receiving section (11). A sampler/filter (20) samples the incoming electrical signals at a rate several times that of the maximum data rate expected of those signals and employs majority-vote circuits (116) to change the value of any samples that are not part of a plurality of sequential samples of the same value. The achieve as balanced a signal as possible, a complementing unit (36) complements alternate groups of bits, and a coding unit (40) imposes a 4-to-5 code in which the code-word imbalances for complementary data words are opposite in the majority of cases. A serializing unit (44) serializes the resulting codewords, which an electrical-to-optical converter (8) transmits over the optic fiber (10) to the receiving section (11), which performs operations the reverse of those performed by the transmitting section (3) so as to forward parallel electrical signals.

Flow Control With Smooth Limit Setting For Multiple Virtual Circuits

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US Patent:
56174098, Apr 1, 1997
Filed:
Jan 28, 1994
Appl. No.:
8/189398
Inventors:
Cuneyt M. Ozveren - Somerville MA
Hallam G. Murray - Menlo Park CA
Gregory M. Waters - Groton MA
Robert J. Simcoe - Westborough MA
Assignee:
Digital Equipment Corporation - Maynard MA
International Classification:
H04J 314
US Classification:
370235
Abstract:
A flow control system is disclosed, for a transmitting node and a receiving node. The transmitting node and the receiving node are linked together through multiple connections or virtual circuits. A flow control circuit in the transmitting node limits the number of data transmission units transmitted from the transmitting station, and not yet copied out of the receive buffers in the receiving node, to the total number of receive buffers in the receiving node. The flow control circuit in the transmitting node further controls the transmission of data transmission units on the multiple connections fairly, such that all connections are provided a proportional amount of the total available receive buffers in the receiving node. In an example embodiment, a global counter is used to maintain the total number of receive buffers containing data in the receiving node, and a global limit register contains the maximum number of receive buffers containing data in the receiving node allowed for a single connection. The flow control circuit further includes logic providing fair and efficient allocation of receive buffers across all virtual circuits between a transmitting node and a destination node.
Gregory B Waters from Woods Cross, UT, age ~74 Get Report