Gordon M Grivna

6498069, Dec 24, 2002

Oct 17, 2001

09/977935

Gordon Grivna - Mesa AZ

Semiconductor Components Industries LLC - Phoenix AZ

H01L 2120

438386, 438422, 438424

A method of making a semiconductor device ( ) includes filling a plurality of trenches ( ) in a substrate ( ) with a first fill material ( ) and lined with a first liner material ( ) to form an isolation structure ( ) in a first trench ( ). The first fill material and the first liner material are removed from a second trench ( ) which is then lined with a second liner material ( ) and filled with a second fill material ( ) to produce a capacitance to the substrate. The first fill material and the first liner material are removed from a third trench ( ), which is filled with the second fill material to form an electrical contact to the substrate. The first fill material is removed from a fourth trench ( ) and dielectric material ( ) is deposited on the substrate to produce a void ( ) in the fourth trench.

6621136, Sep 16, 2003

Sep 28, 2001

09/964727

Gordon M. Grivna - Mesa AZ

Semiconductor Components Industries LLC - Phoenix AZ

H01L 2976

257510, 257410

A semiconductor device ( ) includes an electrical component ( ) formed on a dielectric region ( ) of a semiconductor substrate ( ). The dielectric region is formed with a first plurality of voids ( ) extending into the substrate to a first depth (D ) and a second plurality of voids ( ) extending into the semiconductor substrate to a second depth (D ) greater than the first depth.

6803317, Oct 12, 2004

Aug 16, 2002

10/219167

Gordon M. Grivna - Mesa AZ

Semiconductor Components Industries, L.L.C. - Phoenix AZ

H01L 21311

438694, 438201, 438700, 438723

A method of making a semiconductor device ( ) includes depositing a first conductive layer ( ) on a first surface ( ) to control a channel ( ) of the semiconductor device at a second surface ( ) perpendicular to the first surface. The method further includes etching a first dielectric film ( ) to form a gap ( ) between the first surface and a control electrode ( ) of the semiconductor device, and depositing a conductive material ( ) in the gap to electrically connect the first conductive layer to the control electrode.

6984860, Jan 10, 2006

Nov 27, 2002

10/305773

Gordon M. Grivna - Mesa AZ, US
Irene S. Wan - Phoenix AZ, US
Sudhama C. Shastri - Phoenix AZ, US

Semiconductor Components Industries, L.L.C. - Phoenix AZ

H01L 27/108

257301, 257296, 257300, 257303

A semiconductor device () is formed on a semiconductor substrate () whose surface () is formed with a trench (). A capacitor () has a first plate () formed over the substrate surface with first and second portions lining first and second sidewalls () of the trench, respectively. A second plate () is formed over the first plate and extends into the trench between the first and second portions.

7045845, May 16, 2006

Aug 16, 2002

10/219190

Gordon M. Grivna - Mesa AZ, US

Semiconductor Components Industries, L.L.C. - Phoenix AZ

H01L 27/108

257302, 257297, 257298, 257314, 257315, 438268, 438269, 438273

A transistor () is formed in a semiconductor substrate () whose top surface () is formed with a pedestal structure (). A conductive material () is disposed along a side surface () of the pedestal structure to self-align an edge of a first conduction electrode () of the transistor. A dielectric spacer () is formed along a side surface () of the conductive material to self-align a contact area () of the first conduction electrode.

7087925, Aug 8, 2006

Feb 9, 2004

10/773853

Gordon M. Grivna - Mesa AZ, US

Semiconductor Components Industries, L.L.C. - Phoenix AZ

H01L 29/00

257 34, 438 42, 438337, 438345

In one embodiment, a matrix of free-standing semiconductor shapes are oxidized to form a low capacitance isolation tub. The adjacent rows of shapes in the matrix are offset with respect to each to minimize air gap and void formation during tub formation. In a further embodiment, the spacing between adjacent rows is less than the spacing between shapes within a row.

7176524, Feb 13, 2007

Feb 15, 2005

11/057140

Gary H. Loechelt - Tempe AZ, US
Peter J. Zdebel - Austin TX, US
Gordon M. Grivna - Mesa AZ, US

Semiconductor Components Industries, LLC - Phoenix AZ

H01L 29/94

257341, 257328, 257339, 257342

In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with various layers of semiconductor material including opposite conductivity type layers.

7253477, Aug 7, 2007

Feb 15, 2005

11/057138

Gary H. Loechelt - Tempe AZ, US
Peter J. Zdebel - Austin TX, US
Gordon M. Grivna - Mesa AZ, US

Semiconductor Components Industries, L.L.C. - Phoenix AZ

H01L 29/76
H01L 29/94
H01L 31/062
H01L 31/113
H01L 31/119

257341, 257333, 257328, 257342

In one embodiment, an edge termination structure is formed in a semiconductor layer of a first conductivity type. The termination structure includes an isolation trench and a conductive layer in contact with the semiconductor layer. The semiconductor layer is formed over a semiconductor substrate of a second conductivity type. In a further embodiment, the isolation trench includes a plurality of shapes that comprise portions of the semiconductor layer.