Georgios Chrysanthakopoulos

6643714, Nov 4, 2003

Nov 16, 1999

09/441264

Georgios Chrysanthakopoulos - Kirkland WA

Microsoft Corporation - Redmond WA

G06F 300

710 8, 710 1, 710 2, 710 10, 710 38, 710 13, 710313, 710305, 370202, 709227

Information stored in configuration memory of a first device coupled to a communication bus is exposed to other devices allowing the other devices to ascertain the functionality of the first device. A device driver corresponding to the device can, through an interface, cause a bus driver to alter the contents of the configuration memory thereby changing what information is exposed to other devices. When another device âenumeratesâ the now-altered configuration memory, the other device will learn of the new functionality and proceed in a normal fashion by loading those drivers necessary to use the newly-added functionality. Conversely, when a device and its corresponding device driver is removed, configuration memory is updated accordingly. The present invention may be beneficially applied to systems adhering to the IEEE 1394 Serial Bus standard.

6704819, Mar 9, 2004

Apr 19, 2000

09/553453

Georgios Chrysanthakopoulos - Kirkland WA

Microsoft Corporation - Redmond WA

G06F 100

710240, 710200, 710309

In a system in which control-capable nodes are coupled to each other and one or more devices via a communications bus, the control-capable nodes determine the identity of an owner node of a given device and register with the owner node for notification of changes to the devices ownership. The control-capable nodes may request ownership from the owner node, which request may be granted or denied, or the control-capable nodes may detect that ownership by the owner node has terminated. It such a request is granted, or if such termination is detected, the control-capable nodes attempt to establish ownership of the device according to previously assigned priorities. Data structures supporting these operations provide communications between device drivers and bus drivers in a control-capable node, and provide communications between bus drivers in different control-capable nodes. In this manner, the present invention provides a technique for device arbitration that does not require modifications to, nor participation by, the controlled devices.

6708233, Mar 16, 2004

Feb 1, 2000

09/495755

John Nels Fuller - Redmond WA
Georgios Chrysanthakopoulos - Kirkland WA

Microsoft Corporation - Redmond WA

G06F 1300

710 22, 710 52

A method and apparatus for directly creating a buffer of contiguous payload data from an incoming variable-length data stream utilizes a host controller for providing direct memory access (DMA) to a host computer memory. Payload data and header data from the data stream are stored contiguously in separate buffers in host memory. DMA descriptors, through appropriate software drivers, instruct the DMA engine of host controller to separate payload data and header data of each incoming packet on the data stream and place it in respective buffers in host memory. Thus, two separate logical buffers may be directly created from a single incoming logical variable-length data stream. Payload data is written directly and contiguously to host memory without the need for memory copies and the associated use of main processor resources.

6769077, Jul 27, 2004

Dec 20, 2000

09/742975

Andre F. Vachon - Redmond WA
Georgios Chrysanthakopoulos - Kirkland WA

Microsoft Corporation - Redmond WA

G06F 1100

714 43

A two-computer crash dump scenario in which a snapshot of the physical memory of a target computer is extracted and stored by a host computer over an IEEE 1394 compliant serial bus is provided. A host computer debugger remotely stops execution of the core operating system of the target computer. Handshake information is then provided from the target computer core operating system to the host computer debugger. The handshake information specifies, among other information, one or more address ranges at which physical memory is present on the target computer. The host computer debugger then directly accesses the physical memory of the target computer system over the IEEE 1394 bus in accordance with the handshake information. The host computer then stores the contents of the physical memory of the target computer system. Execution of the core operating system of the target system can then be resumed, and the core operating system of the target computer can be debugged in parallel with the resumed execution of the target computer core operating system.

6810438, Oct 26, 2004

Apr 5, 2000

09/543701

Georgios Chrysanthakopoulos - Kirkland WA

Microsoft Corporation - Redmond WA

G06F 300

710 16, 710302, 717107, 719321

A method for enabling value-added hardware on an interface board in a computer system is disclosed. The method first determines whether an interface board is connected to a bus of a computer system. Then, a general-purpose top-level device driver, which controls standard functions associated with the interface board, is loaded into kernel memory space of the computer system. Next, a value-added device driver is loaded into memory of the computer system. The value-added device driver corresponds to the interface board determined to be connected to the bus of the computer system. Predetermined information, such as a password, or confidential or cryptographic information, is stored at a predetermined address within a memory space of the interface board. The predetermined address corresponds to a predetermined address within value-added hardware on the interface board. A predetermined response is received from the interface board based on the predetermined information.

6820150, Nov 16, 2004

Apr 11, 2001

09/829880

Joseph M. Joy - Redmond WA
Georgios Chrysanthakopoulos - Kirkland WA
Rajesh Sundaram - Redmond WA
Arvind Murching - Issaquah WA

Microsoft Corporation - Redmond WA

G06F 1300

710110, 710107, 710117, 37039543

The invention provides quality-of-service (QoS) delivery services over a computer bus having isochronous data transfer capabilities. A transmitting node on the bus transmits a message to an intended recipient indicating a requested bandwidth for a connection. If the intended recipient has sufficient resources, it allocates an isochronous data channel on the bus and notifies the transmitter of the allocated channel. Thereafter, the transmitter transmits the data on the allocated channel. If the recipient cannot allocate a channel, it does not respond, and the transmitter thereafter detects a time-out condition and begins transmitting using a âbest effortsâ scheme (i. e. , non-guaranteed time delivery). In a second variation, a receiving node detects that it is receiving large quantities of data from a transmitting node. In response, the receiving node allocates an isochronous data channel on the bus and notifies the transmitter of the allocated channel.

6968307, Nov 22, 2005

Apr 28, 2000

09/559531

Georgios Chrysanthakopoulos - Kirkland WA, US

Microsoft Corporation - Redmond WA

G06F009/455

703 27, 703 24

A node on a serial bus, preferably a device such as a personal computer (PC), can emulate other devices using virtual device drivers. A PC connected to a 1394 bus exposes its CROM on the bus which presents an image to other nodes on the 1394 bus and describes the functional units supported by the node. The CROM can be changed dynamically by adding unit directories to the CROM detailing peripherals connected to the PC. The PC can then be enumerated as the connected device by other PCs on the bus. The PC can emulate or morph itself into any desired device or even multiple devices at the same time. The invention also allows a PC to create devices that don't yet exist on the bus. The invention allows a user to create virtual device objects with device properties to have just in case a user plugs the particular device in to the PC.

6996699, Feb 7, 2006

Sep 10, 2002

10/241777

Georgios Chrysanthakopoulos - Redmond WA, US
Brian L. Schmidt - Bellevue WA, US

Microsoft Corporation - Redmond WA

G06F 15/00

712 35, 718108, 718100, 719328, 719330, 717162

Preparing one or more secure media effect programs, generating a binary image of the programs and associated data, loading the binary image into memory of a secondary processor, and executing the programs of the binary image with the secondary processor, substantially independent from a primary processor. A binary image builder automatically maps one or more programs and data to secondary processor memory by changing encoded binary instructions of each program before execution by the secondary processor. The changes identify locations at which the programs and data will be stored in secondary processor memory, identify locations of parameters that can be updated in real time, and enable execution control to return to a secondary processor execution kernel. The secondary processor execution kernel polls flags in a main memory to determine whether to download new or updated state data and/or program code from main memory to the secondary processor memory.