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Friedrich H Doerbeck

from Dallas, TX
Age ~91

Friedrich Doerbeck Phones & Addresses

  • 7215 Azalea Ln, Dallas, TX 75230 (214) 361-8077 (214) 378-6662
  • Arlington, TX
  • 7215 Azalea Ln, Dallas, TX 75230 (254) 716-2352

Work

Position: Service Occupations

Education

Degree: High school graduate or higher

Public records

Vehicle Records

Friedrich Doerbeck

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Address:
7215 Azalea Ln, Dallas, TX 75230
Phone:
(214) 361-8077
VIN:
WBAPH7C59BE674481
Make:
BMW
Model:
3 SERIES
Year:
2011

Publications

Us Patents

Methods And Systems For Characterization And Production Of High Purity Polysilicon

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US Patent:
20110290173, Dec 1, 2011
Filed:
Feb 23, 2009
Appl. No.:
12/589534
Inventors:
David C. Spencer - Heath TX, US
Jimmie D. Walter - Anna TX, US
Friedrich H. Doerbeck - Dallas TX, US
International Classification:
C30B 15/30
C30B 15/16
US Classification:
117 28, 117218
Abstract:
Computer controlled quality control methods for manufacturing high purity polycrystalline granules are introduced. Polycrystalline silicon granules are sampled and converted into single crystal specimen in computer controlled system, eliminating the need of human operator in controlling the processing parameters. Single crystal silicon test samples, then characterized by FTIR and other standard analysis, are therefore more representative of the starting granular silicon.

Method And Systems For Characterization And Production Of High Quality Silicon

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US Patent:
20130112134, May 9, 2013
Filed:
Aug 31, 2012
Appl. No.:
13/601847
Inventors:
David C. Spencer - Heath TX, US
Jimmie D. Walter - Anna TX, US
Friedrich H. Doerbeck - Dallas TX, US
Assignee:
GIGA INDUSTRIES, INC. - Garland TX
International Classification:
C30B 15/20
C30B 15/08
C30B 15/14
US Classification:
117 13, 117216
Abstract:
Computer controlled quality control methods for manufacturing high purity polycrystalline granules are introduced. Polycrystalline silicon granules are sampled and converted into single crystal specimen in computer controlled system, eliminating the need of human operator in controlling the processing parameters. Single crystal silicon test samples, then characterized by FTIR and other standard analysis, are therefore more representative of the starting granular silicon.

Method For Fabricating Gaas Bipolar Integrated Circuit Devices

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US Patent:
46549609, Apr 7, 1987
Filed:
Dec 13, 1985
Appl. No.:
6/808901
Inventors:
William V. McLevige - Plano TX
Walter M. Duncan - Dallas TX
Friedrich H. Doerbeck - Dallas TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 21265
H01L 2948
US Classification:
29576B
Abstract:
Bipolar transistors and other electronic structures are fabricated on a gallium arsenide (GaAs) substrate to form an integrated circuit device. This process is made possible by development of an ion implant technique which uses an acceptor material to create a P type region, boron or protons to create insulating regions, and silicon or selenium to create an N type region. The process avoids the difficult problems encountered in diffusion methods, and, due to the precise control available with the ion implant method, makes possible the fabrication of IC quality transistors consistently over a substrate. This same control enables the fabrication of integrated circuits with improved device packing density and reduced parasitic parameters.

Gaas/Gaalas Heterojunction Bipolar Integrated Circuit Devices

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US Patent:
45730644, Feb 25, 1986
Filed:
Nov 2, 1981
Appl. No.:
6/317367
Inventors:
William V. McLevige - Plano TX
Walter M. Duncan - Dallas TX
Friedrich H. Doerbeck - Dallas TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 2948
H01L 29161
H01L 2702
H01L 2348
US Classification:
357 16
Abstract:
Bipolar transistors and other electronic structures are fabricated on a gallium arsenide (GaAs) substrate to form an integrated circuit device. This integrated circuit device is made possible by development of an ion implant technique which uses an acceptor material to create a P type region, boron or protons to create insulating regions, and silicon or selenium to create an N type region. The use of an ion implant technique avoids the difficult problems encountered in diffusion methods, and, due to the precise control available with ion implantation, makes possible the fabrication of IC quality transistors consistently over a substrate. This same control enables the fabrication of integrated circuits with improved device packing density and reduced parasitic parameters.
Friedrich H Doerbeck from Dallas, TX, age ~91 Get Report