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Fredrick P Lamaster

from Fort Collins, CO
Age ~77
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Also known as:
Fredrick Putney Lamaster, Frederick P Lamaster, Frederick E Lamaster, Fred Lamaster, Fred P Lemaster
Phone and address:
414 Hillsboro Ct N, Fort Collins, CO 80525
(970) 667-4656
Related to:
Shelly Marie Lamaster, 56Darius R Ellis, 47Gerald S Lamaster, 56Frederic Lamaster, 76Carolyn J Lamaster, 76Tammy M Green, 50Byron J Ellis, 59Byron Joe EllisJordan LamasterCarolyn T Lamaster
Connected to:
Alonzo A Lamaster, 96Byron D Lamasters, 42Joyce Lamaster, 70Rachelle C Lamaster, 55Ronald D Lamaster, 60Ryan Lamaster, 34Sarah E Lamaster, 33Salvator J Lamastra, 65David Lamastus, 57Juan Lamata, 37

Fredrick Lamaster Phones & Addresses

  • 414 Hillsboro Ct N, Fort Collins, CO 80525 (970) 667-4656
  • Loveland, CO
  • Greeley, CO
  • 414 Hillsboro Ct N, Fort Collins, CO 80525 (970) 379-9179

Work

Company: Avago technologies Aug 2008 to Feb 2009 Position: Manufacturing engineer

Education

Degree: Bachelors, Bachelor of Science School / High School: University of Arizona 1965 to 1969 Specialities: Electrical Engineering

Skills

Semiconductors • Cmos • Simulations • Silicon • Process Integration • Electronics • Semiconductor Device • Semiconductor Process • Sensors • Ic • Process Simulation • Design of Experiments • Semiconductor Industry

Industries

Semiconductors

Resumes

Resumes

Fredrick Lamaster Photo 1

Fredrick Lamaster

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Location:
414 Hillsboro Ct north, Fort Collins, CO 80525
Industry:
Semiconductors
Work:
Avago Technologies Aug 2008 - Feb 2009
Manufacturing Engineer
Micron Technology Dec 2006 - Jul 2007
Process Engineer
Avago Technologies Dec 2005 - Dec 2006
Image Sensor Device Engineer
Agilent Technologies Jul 2000 - Nov 2005
Semiconductor Process and Device Development Engineer
Hewlett-Packard May 1974 - Jun 2000
Process Integration Engineer
Education:
University of Arizona 1965 - 1969
Bachelors, Bachelor of Science, Electrical Engineering
Skills:
Semiconductors
Cmos
Simulations
Silicon
Process Integration
Electronics
Semiconductor Device
Semiconductor Process
Sensors
Ic
Process Simulation
Design of Experiments
Semiconductor Industry

Publications

Us Patents

Pixel With Asymmetric Transfer Gate Channel Doping

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US Patent:
7557397, Jul 7, 2009
Filed:
Feb 16, 2007
Appl. No.:
11/707848
Inventors:
Chintamani P. Palsule - Fort Collins CO, US
Changhoon Choi - Palo Alto CA, US
Fredrick P. LaMaster - Fort Collins CO, US
John H. Stanback - Fort Collins CO, US
Thomas E. Dungan - Fort Collins CO, US
Thomas Joy - San Jose CA, US
Homayoon Haddad - Beaverton OR, US
Assignee:
Aptina Imaging Corporation - Grand Cayman
International Classification:
H01L 31/06
H01L 21/00
US Classification:
257292, 257233, 257291, 257404, 257431, 257655, 438286
Abstract:
A pixel including a substrate of a first conductivity type and having a surface, a photodetector of a second conductivity type that is opposite the first conductivity type, a floating diffusion region of the second conductivity type, a transfer region between the photodetector and the floating diffusion, a gate positioned above the transfer region and partially overlapping the photodetector, and a pinning layer of the first conductivity type extending at least across the photodetector from the gate. A channel implant of the first conductivity type extending from between a midpoint of the transfer gate and the floating diffusion to at least across the photodiode and having a dopant concentration such that a dopant concentration of the transfer region is greater proximate to the photodetector than the floating diffusion, and wherein a peak dopant concentration of the channel implant is at a level and at a depth below the surface such that a partially-buried channel is formed in the transfer region between the photodiode and floating diffusion when the transfer gate is energized.

Reduced Crosstalk Cmos Image Sensors

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US Patent:
7592654, Sep 22, 2009
Filed:
Nov 15, 2007
Appl. No.:
11/940569
Inventors:
Sandeep R. Bahl - Loveland CO, US
Fredrick P. LaMaster - Loveland CO, US
David W. Bigelow - Loveland CO, US
Assignee:
Aptina Imaging Corporation - Grand Cayman
International Classification:
H01L 31/062
H01L 31/113
H01L 27/14
H01L 31/00
H01L 31/0232
H01L 27/15
H01L 29/26
H01L 31/12
H01L 33/00
H01L 29/417
H01L 29/732
H01L 27/148
US Classification:
257291, 257 80, 257 81, 257 82, 257113, 257114, 257115, 257116, 257117, 257118, 257184, 257185, 257186, 257187, 257188, 257189, 257222, 257225, 257233, 257243, 257257, 257258, 257290, 257292, 257293, 257431, 257432, 257435, 257446, 257E27128, 257E27129, 257E27133, 257E27134, 257E27135, 257E27136
Abstract:
CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.

Pixel With Asymmetric Transfer Gate Channel Doping

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US Patent:
7834383, Nov 16, 2010
Filed:
Jun 9, 2009
Appl. No.:
12/481056
Inventors:
Chintamani P. Palsule - Fort Collins CO, US
Changhoon Choi - Palo Alto CA, US
Fredrick P. LaMaster - Fort Collins CO, US
John H. Stanback - Fort Collins CO, US
Thomas E. Dungan - Fort Collins CO, US
Thomas Joy - San Jose CA, US
Homayoon Haddad - Beaverton OR, US
Assignee:
Aptina Imaging Corporation - Grand Cayman
International Classification:
H01L 31/062
H01L 31/113
US Classification:
257292, 257291, 257404, 257655, 257E33076, 257E27133, 438286
Abstract:
A pixel including a substrate of a first conductivity type and having a surface, a photodetector of a second conductivity type that is opposite the first conductivity type, a floating diffusion region of the second conductivity type, a transfer region between the photodetector and the floating diffusion, a gate positioned above the transfer region and partially overlapping the photodetector, and a pinning layer of the first conductivity type extending at least across the photodetector from the gate. A channel implant of the first conductivity type extending from between a midpoint of the transfer gate and the floating diffusion to at least across the photodiode and having a dopant concentration such that a dopant concentration of the transfer region is greater proximate to the photodetector than the floating diffusion, and wherein a peak dopant concentration of the channel implant is at a level and at a depth below the surface such that a partially-buried channel is formed in the transfer region between the photodiode and floating diffusion when the transfer gate is energized.

Reduced Crosstalk Cmos Image Sensors

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US Patent:
20070029589, Feb 8, 2007
Filed:
Aug 4, 2005
Appl. No.:
11/197004
Inventors:
Sandeep Bahl - Palo Alto CA, US
Fredrick LaMaster - Fort Collins CO, US
David Bigelow - Fort Collins CO, US
International Classification:
H01L 31/113
US Classification:
257290000, 257291000, 257292000, 257E27133
Abstract:
CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.

Pixel With Asymmetric Transfer Gate Channel Doping

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US Patent:
7115924, Oct 3, 2006
Filed:
Jun 3, 2005
Appl. No.:
11/144304
Inventors:
Fredrick P. LaMaster - Fort Collins CO, US
John H. Stanback - Fort Collins CO, US
Chintamani P. Palsule - Fort Collins CO, US
Thomas E. Dungan - Fort Collins CO, US
Assignee:
Avago Technologies Sensor IP Pte. Ltd. - Singapore
International Classification:
H01L 31/62
H01L 21/00
US Classification:
257291, 257292, 438 60, 438199
Abstract:
A pixel including a substrate of a first conductivity type, a photodetector of a second conductivity type that is opposite the first conductivity type and configured to convert incident light to a charge, a floating diffusion of the second conductivity, and a transfer region between the photodetector and floating diffusion. A gate is formed above the transfer region and partially overlaps the photodetector and is configured to transfer charge from the photodetector to the floating diffusion. A pinning layer of the first conductivity type extends at least across the photodetector from the gate. A channel region of the first conductivity type extends generally from a midpoint of the gate at least across the photodiode and is formed by an implant of a dopant of the first conductivity and having a concentration such that a dopant concentration of the transfer region is greater proximate to the photodetector than proximate to the floating diffusion.
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Fredrick P Lamaster from Fort Collins, CO, age ~77 Get Report