Resumes
Resumes
Senior Cad Engineer - Design Verification
View pageLocation:
6305 Augusta National Dr, Austin, TX 78746
Industry:
Semiconductors
Work:
Qualcomm since Oct 2006
Verification Lead
Texas Instruments Nov 2004 - Oct 2006
Verification Lead, Digital Light Projection (DLP)
Texas Instruments 2003 - 2005
Design Verification Engineer, DSP
Texas Instruments 1992 - 2003
CAD/Methodology Engineer, DSP
Texas Instruments 1990 - 1992
Intern
Verification Lead
Texas Instruments Nov 2004 - Oct 2006
Verification Lead, Digital Light Projection (DLP)
Texas Instruments 2003 - 2005
Design Verification Engineer, DSP
Texas Instruments 1992 - 2003
CAD/Methodology Engineer, DSP
Texas Instruments 1990 - 1992
Intern
Skills:
Perl
Functional Verification
Tcl
Eda
Vhdl
Soc
C++
C
Asic
Clearcase
Software Engineering
Systemverilog
Lsf
Configuration Management
Oop
Verilog
Open Verification Methodology
Vera
Specman
Software Development
Object Oriented Programming
Object Oriented Perl
Functional Verification
Tcl
Eda
Vhdl
Soc
C++
C
Asic
Clearcase
Software Engineering
Systemverilog
Lsf
Configuration Management
Oop
Verilog
Open Verification Methodology
Vera
Specman
Software Development
Object Oriented Programming
Object Oriented Perl
Languages:
English