Dirk K Brandis

6654343, Nov 25, 2003

Mar 19, 2001

09/812985

Dirk Kurt Brandis - Novato CA
Yantao Jia - Stow MA
Bob Reissfelder - Westwood MA
Lei Jin - Irvine CA
Shahzad Ali - Rohnert Park CA
Stephen John West - Petaluma CA
Hui Zhang - Santa Rosa CA
Shuangxia Sarah Zhu - Rohnert Park CA

Turin Networks - Petaluma CA

G01R 3108

370229, 370236, 370389

An ingress is coupled with the switch fabric to send flows of data across the switch fabric. Each of the flows of data is associated with a flow identification information and a priority level. An egress is coupled with the switch fabric to receive the flows of data from the ingress. The egress is configured to send one or more flow control messages to the ingress to control a pace that the ingress sends the flows of data to the egress. Each of the flow control messages includes one or more of a flow identification information, an egress space availability information and a new priority level for a flow.

6819686, Nov 16, 2004

Dec 22, 2000

09/745982

Dirk Brandis - Novato CA
Frank Marrone - Cloverdale CA

Turin Networks - Petaluma CA

H04J 300

370535, 370463, 370466, 370352, 370506

A method and apparatus for transferring information in a communications system is described. In one embodiment, the method comprises creating a frame of information on a first line card and sending the frame over a backplane to a second line card using a serial link interconnect. The frame comprises first, second and third portions. The first portion includes information to process the second and third portions. The second portion has packet and time-division multiplexed (TDM) data in multiple channels. Each of the channels is allocable to packet data or TDM data. The third portion includes data placed into the frame to accommodate for differences in timing references between the line cards.

7006438, Feb 28, 2006

May 31, 2001

09/872125

Steve West - Petaluma CA, US
Dirk Brandis - Novato CA, US
Russ Smith - Sebastopol CA, US
Frank Marrone - Cloverdale CA, US

Turin Networks - Petaluma CA

H04J 3/14

370231, 370235, 3703951, 37039541, 370468

The network switch described herein provides a cell/packet switching architecture that switches between line interface cards across a meshed backplane. In one embodiment, the switching can be accomplished at, or near, line speed in a protocol independent manner. The protocol independent switching provides support for various applications including Asynchronous Transfer Mode (ATM) switching, Internet Protocol (IP) switching, Multiprotocol Label Switching (MPLS) switching, Ethernet switching and frame relay switching. The architecture allows the network switch to provision service on a per port basis. In one embodiment, the network switch provides a non-blocking topology with both input and output queuing and per flow queuing at both ingress and egress. Per flow flow-control can be provided between ingress and egress scheduling. Strict priority, round robin, weighted round robin and earliest deadline first scheduling can be provided.

56511299, Jul 22, 1997

Mar 6, 1996

8/611353

Timothy A. Yokote - Torrance CA
Grant J. Stockton - Long Beach CA
Eric L. Upton - North Redondo Beach CA
Arthur G. Enyedy - Redondo Beach CA
Dirk K. Brandis - Hermosa Beach CA

TRW Inc. - Redondo Beach CA

G06F 1300
H04N 710

395431

A modular solid-state mass data storage device providing high-density, high capacity storage of numerous full-length movies for video server applications. The mass data storage device employs a modular pipeline architecture in which a distributed array of controller/memory modules is arranged in parallel controller/memory channels on one or more controller/memory cards. The modular pipeline architecture, in which each controller/memory channel has multiple controller/memory modules connected in a serial chain by address, data and control buses, allows the number of controller/memory modules in each channel and the number of controller/memory channels to be selected to accommodate a desired storage size and transfer rate, without an undesirably high latency time. An asynchronous transfer mode (ATM) switch allows multiple viewers to access the movies stored in the mass data storage device with independent video cassette recorder (VCR)-like control of the movie being watched. In a disclosed embodiment, the controller/memory modules in each channel are connected to first and second buses which extend from a data format module, the first bus also extending from the last controller/memory modules in each channel back to the data format module.

60671084, May 23, 2000

Dec 12, 1996

8/764472

Timothy A. Yokote - Torrance CA
Dirk K. Brandis - Novato CA
Thomas J. Gritzmacher - Torrance CA

TRW Inc. - Redondo Beach CA

H04N 710

348 7

Apparatus, and a related method for its operation, for generating multiple parallel streams of data from a large solid-state mass storage device, under the individual control of multiple users requesting the data streams. The apparatus includes a hardware interface table containing a user command and current memory address for each active user requesting data from storage. Memory array addressing logic cycles through the hardware interface table and generates multiple streams of memory array addresses based on the user commands and the current memory addresses, but without using a processor to generate the addresses. The address streams are directed to a memory array, from which are output multiple streams of corresponding data. User commands for selective control of each data stream are converted to new memory addresses, which are stored in the hardware interface table and almost instantly result in performance of requested control functions with respect to the data streams.

54716039, Nov 28, 1995

Oct 19, 1992

7/963192

Timothy A. Yokote - Torrance CA
Eric L. Upton - Redondo Beach CA
Arthur G. Enyedy - Redondo Beach CA
Grant J. Stockton - Long Beach CA
Dirk K. Brandis - Hermosa Beach CA

TRW Inc. - Redondo Beach CA

G06F 1300
G06F 1312

395402

A modular solid-state mass data storage device providing high-density, high-capacity storage of data employs a modular pipeline architecture in which a distributed array of controller/memory modules is arranged in parallel controller/memory channels on one or more controller/memory cards, each controller/memory channel having first and last controller/memory modules. The modular storage device also includes a data format module, and first and second busses connecting outputs of the data format module to inputs of each of the first and last controller/memory modules. The first bus also connects outputs of the last controller/memory module in each channel back to an input of the data format modules. The modular pipeline architecture allows the number of controller/memory modules in each channel to be easily configured to accommodate any required storage size, while the number of controller/memory channels can be configured to accommodate any required storage size and transfer rate, without increasing latency time. The modular pipeline architecture also greatly simplifies the complexity of the memory controllers, and high-density packaging of the controller/memory modules provides compact storage for large amounts of data.