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Devrim Yilmaz Aksin

from Stokesdale, NC
Age ~52
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Also known as:
Devrim Y Aksin
Related to:
Stephen M Smith, 50Tina G Tedder, 58Lanny N Smith, 76Frances L SmithMichele Mason Carroll, 82Kay M Smith, 71Jocelyn M Smith, 43Justin P Smith, 41
Connected to:
Linda K Aksland, 81Scott S Aksman, 80Ayse Aksoy, 34Elif Aksoy, 35Hulya Aksoy, 43Kadir M Aksoy, 39Meltem Aksoy, 44Onur Aksoy, 41Osman Aksoy, 42Won L Aksoylu, 69

Devrim Aksin Phones & Addresses

  • Stokesdale, NC
  • Albuquerque, NM
  • Dallas, TX
  • Richardson, TX
  • College Station, TX

Work

Company: Analog devices Jul 2014 Position: Analog design engineer

Education

Degree: Master of Business Administration, Masters School / High School: Istanbul Technical University 2008 to 2009

Skills

Integrated Circuit Design • Analog Circuit Design • Vlsi • Simulations • Research • Cadence Virtuoso • Science • Matlab • Engineering • Circuit Design • Cmos • Mixed Signal • Signal Processing • Teaching • Pll • Spice • Simulink • Vhdl • Pspice • Data Conversion • Amplifiers • Frequency Synthesizers • Data Converters • High Voltage • Fpga • Very Large Scale Integration

Languages

English • French • Turkish

Interests

Reference Circuits • Track and Hold Amplifier • Delta Sigma • High Speed Integrated Data Converters • High Resolution • Multi Stage • Line Driving • Pipeline • Frequency Synthesis • R2R • R Ladder • Current Steering • Sar

Industries

Semiconductors

Resumes

Resumes

Devrim Aksin Photo 1

Analog Design Engineer

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Location:
8902 Shedan Ct, Stokesdale, NC 27357
Industry:
Semiconductors
Work:
Analog Devices
Analog Design Engineer
Hittite Microwave Corporation Nov 2013 - Jun 2014
Engineering Manager
Istanbul Technical University Jun 2006 - Nov 2013
Assistant Professor
Texas Instruments May 2004 - Oct 2007
Design Engineer
Eta Asic Design Center Feb 1995 - Dec 2000
Design Engineer
Education:
Istanbul Technical University 2008 - 2009
Master of Business Administration, Masters The University of Texas at Dallas 2002 - 2006
Doctorates, Doctor of Philosophy, Design, Electronics Engineering, Electronics Texas A&M University 2000 - 2002
Doctorates, Doctor of Philosophy, Electronics Engineering, Electronics Istanbul Technical University 1999 - 2000
Doctorates, Doctor of Philosophy, Communication, Engineering, Electronics Istanbul Technical University 1996 - 1999
Master of Science, Masters, Communication, Engineering, Electronics Istanbul Technical University 1992 - 1996
Bachelors, Bachelor of Science, Communication, Engineering, Electronics Galatasaray Lisesi 1985 - 1992
Skills:
Integrated Circuit Design
Analog Circuit Design
Vlsi
Simulations
Research
Cadence Virtuoso
Science
Matlab
Engineering
Circuit Design
Cmos
Mixed Signal
Signal Processing
Teaching
Pll
Spice
Simulink
Vhdl
Pspice
Data Conversion
Amplifiers
Frequency Synthesizers
Data Converters
High Voltage
Fpga
Very Large Scale Integration
Interests:
Reference Circuits
Track and Hold Amplifier
Delta Sigma
High Speed Integrated Data Converters
High Resolution
Multi Stage
Line Driving
Pipeline
Frequency Synthesis
R2R
R Ladder
Current Steering
Sar
Languages:
English
French
Turkish

Publications

Us Patents

Analog-To-Digital Converter With Input Signal Range Greater Than Supply Voltage And Extended Dynamic Range

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US Patent:
7233275, Jun 19, 2007
Filed:
Nov 16, 2005
Appl. No.:
11/280086
Inventors:
Devrim Y. Aksin - Dallas TX, US
Mohammad A. Al-Shyoukh - Richardson TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03M 1/34
US Classification:
341162, 341155
Abstract:
An analog-to-digital converter device capable of measuring inputs beyond a supply voltage including: an N bit analog-to-digital converter powered by a supply voltage and a reference voltage; a range resolution stage capable of receiving inputs at higher voltages than the supply voltage, providing an input to the analog-to-digital converter, and outputting a logic value of one for the N+1th bit in response to an input signal higher than the reference voltage; and a bootstrapped input multiplexer stage for connecting low voltage input signals directly to the analog-to-digital converter and for connecting input signals that can exceed the supply voltage to the range resolution stage.

Bootstrapping Circuit Capable Of Sampling Inputs Beyond Supply Voltage

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US Patent:
7253675, Aug 7, 2007
Filed:
Jun 22, 2005
Appl. No.:
11/159005
Inventors:
Devrim Y. Aksin - Richardson TX, US
Mohammad A. Al-Shyoukh - Richardson TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03K 17/16
US Classification:
327390, 327589, 327536
Abstract:
The bootstrapping circuit capable of sampling inputs beyond supply voltage includes: a bootstrapped switch MN coupled between an input node and an output node; a first transistor MP having a first end coupled to a control node of the bootstrapped switch MN a clock bootstrapped capacitor C having a first end coupled to a second end of the first transistor MP a second transistor MN coupled between the first end of the first transistor MP and a supply node, and having a control node coupled to a first clock signal node PHI; a third transistor MN coupled between the second end of the first transistor MP and the supply node; a charge pump having a first output coupled to a control node of the third transistor MN a level shifter having a first output coupled to a second end of the clock bootstrapped capacitor C a fourth transistor MN coupled between the supply node and a control node of the first transistor MP and having a control node coupled to a second output of the charge pump; a capacitor coupled between a second output of the level shifter and a control node of the first transistor; and a fifth transistor MN coupled between the control node of the bootstrapped switch MN and a common node.

Bootstrapped Switch For Sampling Inputs With A Signal Range Greater Than Supply Voltage

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US Patent:
7385440, Jun 10, 2008
Filed:
Nov 16, 2005
Appl. No.:
11/280644
Inventors:
Devrim Y. Aksin - Dallas TX, US
Mohammad A. Al-Shyoukh - Richardson TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03K 17/10
H03M 1/00
US Classification:
327589, 327390
Abstract:
A bootstrapped circuit for sampling inputs with a signal range greater than supply voltage includes: a bootstrapped switch coupled between an input node and an output node; a first transistor coupled to a control node of the bootstrapped switch; a first capacitor having a first end coupled to the first transistor; a second transistor coupled between the first transistor and a supply node, and having a control node coupled to a first clock signal node; a third transistor coupled between the first transistor and the supply node; a charge pump having an output coupled to a control node of the third transistor; a level shifter coupled to a second end of the first capacitor; a fourth transistor coupled between the supply node and a control node of the first transistor; and a fifth transistor coupled between the control node of the fourth transistor and the output of the charge pump and, having a control node coupled to the supply node; wherein the second end of the first capacitor can be charged to an input voltage.

Soft-Start Circuit And Method For Low-Dropout Voltage Regulators

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US Patent:
7459891, Dec 2, 2008
Filed:
Mar 7, 2007
Appl. No.:
11/683074
Inventors:
Mohammad A. Al-Shyoukh - Richardson TX, US
Marcus M Martins - Richardson TX, US
Devrim Yilmaz Aksin - Dallas TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G05F 1/565
G05F 1/575
US Classification:
323274, 323275, 323901, 323908
Abstract:
A low drop-out voltage regulator having soft-start. A low drop-out regulator circuit is provided having an input node, an output node, a power FET connected by a source and drain between the input node and the output node, and a feedback circuit having an output connected and providing a control signal to a gate of the power FET. A current limit circuit is configured to control the power FET to limit the current through it when the voltage across a controllable sense resistor connected to conduct a current representing the current through the power FET exceeds a predetermined limit value. At start-up, control unit provides a control signal to the controllable resistor to cause the resistance value of the controllable resistor to decrease incrementally in value at respective predetermined incremental times during a predetermined time interval.

Bootstrapped Switch With An Input Dynamic Range Greater Than Supply Voltage

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US Patent:
20060202735, Sep 14, 2006
Filed:
Jun 27, 2005
Appl. No.:
11/168035
Inventors:
Devrim Aksin - Richardson TX, US
Mohammad Al-Shyoukh - Richardson TX, US
International Classification:
H03K 17/16
US Classification:
327390000
Abstract:
The bootstrapping circuit capable of sampling inputs beyond supply voltage includes: a bootstrapped switch coupled between an input node and an output node; a first transistor having a first end coupled to a control node of the bootstrapped switch, and having a backgate coupled to the second end of the first transistor; a first capacitor having a first end coupled to a second end of the first transistor; a second transistor coupled between the first end of the first transistor and a supply node, and having a control node coupled to a first clock signal node; a third transistor coupled between the second end of the first transistor and the supply node; a charge pump having an output coupled to a control node of the third transistor; a level shifter having an output coupled to a second end of the first capacitor; a fourth transistor cross coupled with the first transistor, and having a backgate coupled to the second end of the fourth transistor; a fifth transistor having a second end coupled to the first end of the fourth transistor, and having a control node coupled to the output of the level shifter, and having a backgate coupled to the second end of the fifth transistor; a sixth transistor coupled between the first end of the fifth transistor and a common node and having a control node coupled to the first clock signal node; a diode having a first end coupled to the output of the level shifter and a second end coupled to the control node of the first transistor; a seventh transistor coupled between the control node of the bootstrapped switch and a common node, and having a control node coupled to the second clock signal node; and an eighth transistor coupled between the supply node and the control node of the first transistor, and having a control node coupled to the second clock signal node.

Transconductance Circuits With Degeneration Transistors

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US Patent:
20230023984, Jan 26, 2023
Filed:
Oct 4, 2022
Appl. No.:
17/959481
Inventors:
- Wilmington MA, US
Devrim AKSIN - Stokesdale NC, US
Assignee:
Analog Devices, Inc. - Wilmington MA
International Classification:
H03F 3/45
Abstract:
An example transconductance circuit includes a first portion that includes a first degeneration transistor, configured to receive a first input voltage, and a second portion that includes a second degeneration transistor, coupled to the first degeneration transistor and configured to receive a second input voltage. The first portion further includes a first input transistor, coupled to the first degeneration transistor and configured to provide a first output current, while the second portion further includes a second input transistor, coupled to the second degeneration transistor and configured to provide a second output current. Such a transconductance circuit may be used as an input stage capable of reliably operating within drain-source breakdown voltage of the transistors employed therein even in absence of any other protection devices, and may be significantly faster, consume lower power, and occupy smaller die area compared to conventional transconductance circuits.

Linear Broadband Transconductance Amplifier

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US Patent:
20210104988, Apr 8, 2021
Filed:
Oct 2, 2019
Appl. No.:
16/590911
Inventors:
- Norwood MA, US
Devrim Yilmaz Aksin - Stokesdale NC, US
International Classification:
H03F 3/45
Abstract:
An amplifier circuit comprises a differential input stage and a differential output stage. The differential input stage includes a first differential input transistor pair coupled to a differential input of the amplifier circuit, and a second differential input transistor pair coupled to the differential input and the differential output stage; a degeneration impedance coupled between first transistors of the first and second differential input transistor pairs and second transistors of the first and second differential input transistor pairs; and a feedback circuit coupled to the first and second differential input transistor pairs and the degeneration impedance, wherein output current is provided from the differential input stage to the differential output stage by the feedback circuit and transition current is provided to the output stage by the second differential input transistor pair.
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Devrim Yilmaz Aksin from Stokesdale, NC, age ~52 Get Report