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Detlef Griessman Phones & Addresses

  • Palm Coast, FL
  • 515 Venetian Way, Kokomo, IN 46901 (765) 452-7139
  • 3505 Monument Dr, W Lafayette, IN 47906 (765) 398-6910
  • West Lafayette, IN
  • W Lafayette, IN
  • 3505 Monument Dr, West Lafayette, IN 47906 (765) 284-1055

Work

Company: Landis + gyr Sep 2010 Position: Development engineering manager r&d

Education

Degree: MSEE School / High School: Purdue University 1990 to 1993 Specialities: Electrical Engineering

Skills

Semiconductors • Ic • Engineering Management • Fmea • Engineering • Electronics • Six Sigma • Spc • R&D • Continuous Improvement • Root Cause Analysis • Manufacturing • Kaizen • Automotive • Apqp • Dmaic • Lean Manufacturing • Ppap • Manufacturing Engineering • Electrical Engineering • Supplier Quality • Program Management • Product Development • Dfmea • Manufacturing Operations Management • 5S • Testing • Failure Mode and Effects Analysis • Process Engineering • Quality System • Ts16949 • Embedded Systems • Operational Excellence

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Detlef Griessman Photo 1

Detlef Griessman

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Location:
3505 Monument Dr, West Lafayette, IN 47906
Industry:
Electrical/Electronic Manufacturing
Work:
Landis + Gyr since Sep 2010
Development Engineering Manager R&D

Delphi Oct 2004 - Sep 2010
IC Architecture and Development Mgr

Delphi Automotive Systems Feb 2001 - Sep 2004
Component Engineering Mgr

Delphi 1998 - Jan 2001
Supervisor smart power IC Development

Delphi 1996 - 1998
Program Manager Powertrain IC Development
Education:
Purdue University 1990 - 1993
MSEE, Electrical Engineering
Purdue University 1979 - 1984
BSEE, Electrical Engineering
Skills:
Semiconductors
Ic
Engineering Management
Fmea
Engineering
Electronics
Six Sigma
Spc
R&D
Continuous Improvement
Root Cause Analysis
Manufacturing
Kaizen
Automotive
Apqp
Dmaic
Lean Manufacturing
Ppap
Manufacturing Engineering
Electrical Engineering
Supplier Quality
Program Management
Product Development
Dfmea
Manufacturing Operations Management
5S
Testing
Failure Mode and Effects Analysis
Process Engineering
Quality System
Ts16949
Embedded Systems
Operational Excellence

Publications

Us Patents

Am Stereo Detection And Audio Processing Apparatus

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US Patent:
53414314, Aug 23, 1994
Filed:
Oct 1, 1992
Appl. No.:
7/954721
Inventors:
Detlef Griessman - Kokomo IN
Gregory J. Manlove - Kokomo IN
Thomas G. Block - Carmel IN
Gordon P. Howlett - Greentown IN
Assignee:
Delco Electronics Corporation - Kokomo IN
International Classification:
H04H 500
US Classification:
381 15
Abstract:
A synchronous AM detector and processor requiring a reduced number of external components and fewer integrated circuit pins comprises an audio processor having a first filter operation controlled by a control voltage and an AM stereo decoder including a lock detector and a phase locked loop having a second filter operation controlled by the control voltage. A single control node is coupled to the audio processor and the phase locked loop, the control node providing the control voltage for the audio processor and the phase locked loop. The voltage at the control node is biased normally high, capable of being pulled low by the audio processing circuit and capable of being pulled low by the lock detector. An RC circuit decays the rise time of the control voltage at the control node after the control voltage has been pulled low. Circuitry is added to control the first filter operation of the audio processing circuitry responsive to the control voltage at the control node.

Out-Of-Lock Detector For Synchronous Am Detection

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US Patent:
53596617, Oct 25, 1994
Filed:
Oct 1, 1992
Appl. No.:
7/954997
Inventors:
Gregory J. Manlove - Kokomo IN
Detlef Griessman - Kokomo IN
Richard A. Kennedy - Kokomo IN
Thomas G. Block - Carmel IN
Assignee:
Delco Electronics Corporation - Kokomo IN
International Classification:
H04H 500
US Classification:
381 15
Abstract:
An AM stereo receiver in which a synchronous in-phase signal is determined comprises a low pass filter circuit for determining an average DC value of the synchronous in-phase signal, a reference voltage supply for providing a reference voltage indicative of a predetermined portion of the DC value of the synchronous in-phase signal occurring during a 100% IF signal level condition, a comparison circuit for comparing the average DC value of the synchronous in-phase signal to the predetermined reference, and an output circuit outputting a signal indicative of an out-of-lock condition when the average DC value of the synchronous in-phase signal falls below the predetermined reference.

Detecting Current Measurement Tampering By Current Transformer Parallel Impedance

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US Patent:
20170219639, Aug 3, 2017
Filed:
Jan 30, 2017
Appl. No.:
15/420078
Inventors:
- Lafayette IN, US
Matthew E. Kraus - Jamestown IN, US
Detlef Griessman - West Lafayette IN, US
International Classification:
G01R 22/06
G01R 19/04
G01R 15/14
Abstract:
A method detects an error in a meter having a current transformer, a burden resistor unit and a resistive path switchably connectable across the burden resistor unit. The method includes obtaining in the processing circuit a first value representative of the voltage magnitude across the burden resistor unit while the resistive path is operably decoupled across the burden resistor unit. The method also includes closing a switching element to operably couple the resistive path across the burden resistor unit, and obtaining in a processing circuit a second value representative of a voltage magnitude across the burden resistor unit. The method further includes determining in the processing circuit whether an error exists based on the first value, the second value, and at least one predetermined stored value.
Detlef H Griessman from Palm Coast, FL, age ~64 Get Report