Delbert R Cecchi

6344756, Feb 5, 2002

Nov 14, 2000

09/712594

Delbert Raymond Cecchi - Rochester MN
Charles C. Hanson - Goodhue MN
Curtis Walter Preuss - Olmsted MN

International Business Machines Corporation - Armonk NY

H03K 1716

326 26, 326 30, 326 82

An echo cancellation circuit for neutralizing signal reflections in a differential link interface, and a method for achieving the same. The differential link interface includes a line driver that generates a line drive signal and a replica driver for generating a replica signal that mirrors the line drive signal within the differential link. The echo cancellation circuit includes a slope adjustment device within the replica driver for temporarily altering the slope of the replica line drive signal during a signal reflection at the output of the line driver, such that the amplitude of the replica signal corresponds to the amplitude of the line drive signal during the signal reflection.

6466626, Oct 15, 2002

Feb 23, 1999

09/256517

Delbert Raymond Cecchi - Rochester MN
Richard L. Donze - Rochester MN

International Business Machines Corporation - Armonk NY

H04B 300

375257, 333 24 R

A digital data waveform is precompensated for attenuation through a transmission medium. First, during actual initial power-on or upon reconfiguration of a digital communication system, attenuation characteristics of the transmission medium are actually measured. The attenuation characteristics can be measured by measuring the length of the transmission medium, measuring the error rate of test packets having known frequency, measuring the slope of a test pulse at two separate threshold voltages, and/or measuring the error rate of a random signal packet. Upon determination of the magnitude of the attenuation characteristic, one of a plurality of registers corresponding to the range of values of the attenuation characteristic is selected. These registers have a plurality of pre-emphasis coefficients to be applied in the driver to each bit of a series of digital signal pulses as determined by the transition history of at least three sequential bits. Thus, dynamic and in-situ pre-emphasis can be determined and applied to signals to compensate for attenuation in the transmission network attenuation.

6504417, Jan 7, 2003

Aug 15, 2001

09/930670

Delbert R. Cecchi - Rochester MN
Charles C. Hanson - Kenyon MN
Curtis W. Preuss - Rochester MN

International Business Machines Corporation - Armonk NY

H03L 500

327308

A resistance circuit includes an off-chip resistor having a precision resistance; a plurality of on-chip switchable resistors, each of which is capable being switched so as to be coupled in parallel to a nominal resistor; and a resistance comparison unit. The resistance comparison unit compares a plurality of on-chip comparison resistors to the off-chip resistor and couples a number of the on-chip switchable resistors to the nominal resistor so that the combined resistance of the parallel combination of the nominal resistor and the coupled on-chip switchable resistors is within a predetermined range of the precision resistance.

6519663, Feb 11, 2003

Jan 12, 2000

09/481537

Thomas James Osten - Rochester MN
Delbert Raymond Cecchi - Rochester MN
Gregory Scott Still - Raleigh NC

International Business Machines Corporation - Armonk NY

G06F 1300

710100, 713323, 709203

Enclosure services in a computer system having a Host computer and at least one Target device, are provided on a functional path, which is preferably a relatively high-speed, point-to-point serial bus between the Host computer and the at least one Target device. The at least one Target device and the Host computer each have a full power operational mode and an auxiliary power mode. The Host computer generates enclosure services commands and sends them to the at least one Target device on the functional path. The at least one Target device can receive and respond to the enclosure services commands, even when in the auxiliary power mode.

6549971, Apr 15, 2003

Aug 26, 1999

09/383735

Delbert Raymond Cecchi - Rochester MN
Daniel Mark Dreps - Georgetown TX

International Business Machines Corporation - Armonk NY

G06F 100

710306, 710105, 330301, 327 55

A differential receiver circuit including first, second, and third amplification stages. The first amplification stage is configured to receive a differential input signal and to produce a single ended first output signal responsive to the differential input signal. The second amplification stage is connected in parallel with the first stage and configured to receive the differential input signal and to produce a second output signal responsive to the differential input signal. The third amplification stage is configured to receive the first and second output signals and to produce a single ended third output signal indicative of the differential in the first and second output signals. In one embodiment the differential receiver circuit further includes an inhibit circuit configured receive an inhibit control signal and to drive the p-channel devices gated to the first amplifier node and the n-channel devices gated to the second amplifier node to cutoff when the inhibit control signal is in a specified inhibit state. The inhibit circuit is preferably further configured to provide a low impedance path between the first amplifier node, the second amplifier node, and the feedback node when the inhibit control signal is in a specified functional state.

6690196, Feb 10, 2004

Aug 8, 2002

10/216617

Delbert R. Cecchi - Rochester MN
Daniel N. De Araujo - Cedar Park TX
Daniel M. Dreps - Georgetown TX
John S. Mitby - Rochester MN

International Business Machines Corporation - Armonk NY

H03K 190175

326 82, 326 30, 326 86, 326 90

A system for transmitting and receiving data between the near end to the far end of a transmission line. The system has simultaneous bi-directional (SBIDI) drivers and receivers for high performance over well behaved transmission lines. The SBIDI drivers and SBIDI receivers are enabled and disabled by logic inputs. A unidirectional (UNI) receiver is connected in parallel with each SBIDI receivers. Logic insures that the SBIDI and UNI receivers are not enabled at the same time. When desired, the SBIDI receivers are disabled and the UNI receivers enabled and signaling is done unidirectional. The current level in the SBIDI drivers may be modified in response to mode compensation signals to improve signal to noise in the unidirectional mode and to compensate for losses in the simultaneous bi-directional mode. The system may be integrated into all I/Os for maximum design flexibility.

6933743, Aug 23, 2005

Nov 20, 2003

10/718219

Delbert R. Cecchi - Rochester MN, US
Michael Launsbach - Rochester MN, US
Curtis Walter Preuss - Rochester MN, US
David W. Siljenberg - Byron MN, US

International Business Machines Corporation - Armonk NY

H03K019/00

326 16, 326 86

A dual mode, analog differential and complementary metal oxide semiconductor (CMOS) logic circuit is provided. The circuit includes a differential input for receiving a differential input signal. A switch pair is coupled to the differential input. A pair of load resistors coupled to the switch pair defines a differential output for providing a differential output signal. A current source is coupled to the switch pair. A control input receives a control signal and control circuitry coupled to the control input disable the current source to select a CMOS testing mode responsive to the control signal being activated.

6944239, Sep 13, 2005

Jan 2, 2002

10/037537

Delbert Raymond Cecchi - Rochester MN, US
Charles C. Hanson - Kenyon MN, US
Curtis Walter Preuss - Rochester MN, US

International Business Machines Corporation - Armonk NY

H04L027/38

375316, 375257, 326 86

Methods and apparatus are provided for implementing a receiver capable of receiving signals in simultaneous bi-directional current mode differential links. The receiver comprises a resistor-summing network and a differential amplifier. The resistor-summing network can also comprise capacitors for the purpose of attenuating high-frequency noise at the differential amplifier. The high-frequency noise can arise from impedance discontinuities in the signal paths or from differences in rising or falling transition times between the data driver and the replica driver in the links.