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Dehai Te Kong

from Cupertino, CA
Age ~59

Dehai Kong Phones & Addresses

  • 11519 Murano Cir, Cupertino, CA 95014
  • Milpitas, CA
  • San Jose, CA
  • Daly City, CA
  • 1639 Wolfe Rd, Sunnyvale, CA 94087
  • Santa Clara, CA
  • Fremont, CA
  • Lovettsville, VA

Work

Position: Professional/Technical

Education

Degree: Associate degree or higher

Emails

Business Records

Name / Title
Company / Classification
Phones & Addresses
Dehai Kong
President
Booksoft, Inc
122 2 Ave, San Mateo, CA 94401
2312 Walsh Ave, Santa Clara, CA 95051

Publications

Us Patents

Apparatus And Method For High Speed Data Transfer

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US Patent:
7302508, Nov 27, 2007
Filed:
Dec 18, 2003
Appl. No.:
10/740948
Inventors:
Dehai (Roy) Kong - Sunnyvale CA, US
Zhou (Mike) Hong - Cupertino CA, US
Assignee:
Via Technologies, Inc. - Hsin-Tien, Taipei
International Classification:
G06F 13/14
G06F 1/00
US Classification:
710107, 710 58, 713500
Abstract:
An improved target and initiator. The initiator provides a starting address and length information on a bus synchronously with a clock signal. While the starting address and length information are present on the bus, the initiator provides a write or a read request signal that is activated and deactivated synchronously. The initiator then receives from the target unit a grant signal that is activated and deactivated synchronously. After the grant signal is deactivated, for a write operation, the initiator provides a number of write data items on the bus synchronously for capture by the target unit. For a read operation, the target provides a number of read data items on the bus synchronously for capture by the initiator unit. One data item provided in each clock cycle of the clock signal and the number of data items is determined by the length information provided.

Switching Method And System For Multiple Gpu Support

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US Patent:
7340557, Mar 4, 2008
Filed:
Dec 15, 2005
Appl. No.:
11/300705
Inventors:
Dehai Kong - Cupertino CA, US
Wen-Chung Chen - Cupertino CA, US
Ping Chen - San Jose CA, US
Irene Chih-Yiieh Cheng - San Jose CA, US
Tatsang Mak - Milpitas CA, US
Xi Liu - Shanghai, CN
Li Zhang - ShangHai, CN
Li Sun - Shanghai, CN
Chenggang Liu - Shanghai, CN
Assignee:
Via Technologies, Inc. - Taipei
International Classification:
G06F 13/00
G06F 13/36
US Classification:
710316, 710306, 710311
Abstract:
A system and method for supporting multiple graphics processing units (GPUs) includes a first communication path coupled to a root complex device and a first connection point of a first GPU. A second communication path is coupled to the root complex device and a first set of switches. The first set of switches is configured to route communications between the root complex device to either a second connection point of the first GPU via a second set of switches or to a first connection point of a second GPU. The second set of switches is coupled to a second connection point of the first GPU. The second set of switches is configured to route communications to and from the second connection point of the first GPU and to either the root complex device via the first set of switches or to a second connection point of the second GPU.

Multiple Graphics Processor Systems And Methods

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US Patent:
8004531, Aug 23, 2011
Filed:
Oct 13, 2006
Appl. No.:
11/549409
Inventors:
Wen-Chung Chen - Cupertino CA, US
Li Liang - Shanghai, CN
Dehai (Roy) Kong - Cupertino CA, US
Mitch Singer - Oviedo FL, US
Assignee:
Via Technologies, Inc. - Taipei
International Classification:
G06F 15/16
G06F 15/00
G06T 1/00
US Classification:
345502, 345501
Abstract:
Multiple graphics processor system and method embodiments are disclosed. One system embodiment, among others, comprises a multiple graphics processor system, comprising a first graphics processing unit having first status information and a second graphics processing unit having second status information, and first key logic corresponding to the first graphics processing unit, the first key logic configured to compare the first and second status information and communicate to the first graphics processing unit a key corresponding to the lowest completed stage of processing among the first and second graphics processing units.

Method And Circuit For Command Integrity Checking (Cic) In A Graphics Controller

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US Patent:
20050028047, Feb 3, 2005
Filed:
Jul 30, 2003
Appl. No.:
10/631336
Inventors:
Dehai Kong - Sunnyvale CA, US
International Classification:
G06F011/00
US Classification:
714052000
Abstract:
A fault tolerant graphics controller that generates error codes for graphics commands and checks the error codes before the graphics controller executes the command. The error code generator may be configured to detect and correct errors or to just detect errors. If an error is detected or an uncorrectable error occurs, the host computing system can be informed or interrupted, the erroneous command can be flushed from the graphics controller or the commands before and after the possibly erroneous command can be stored to help determine the erroneous command. Error codes can be generated on a block basis and stored in the frame buffer, thereby having minimal impact on system performance.

Method And System For Multiple Gpu Support

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US Patent:
20070139423, Jun 21, 2007
Filed:
Dec 15, 2005
Appl. No.:
11/300980
Inventors:
Dehai Kong - Cupertino CA, US
Wen-Chung Chen - Cupertino CA, US
Ping Chen - San Jose CA, US
Irene (Chih-Yiieh) Cheng - San Jose CA, US
Tatsang Mak - Milpitas CA, US
Xi Liu - Shanghai, CN
Li Zhang - Shanghai, CN
Li Sun - Shanghai, CN
Chenggang Liu - Shanghai, CN
International Classification:
G06F 15/16
US Classification:
345502000, 710306000
Abstract:
Supporting multiple graphics processing units (GPUs) comprises a first path coupled to a north bridge device (or a root complex device) and a first GPU, which may include a portion of the first GPU's total communication lanes. A second communication path may be coupled to the north bridge device and a second GPU and may include a portion of the second GPU's total communication lanes. A third communication path may be coupled between the first and second GPUs directly or through one or more switches that can be configured for single or multiple GPU operations. The third communication path may include some or all of the remaining communication lanes for the first and second GPUs. As a nonlimiting example, the first and second GPUs may each utilize an 8-lane PCI express communication path with the north bridge device and an 8-lane PCI express communication path with each other.

Apparatus, System, And Method For Individualized And Dynamic Advertisement In Cloud Computing And Web Application

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US Patent:
20110208570, Aug 25, 2011
Filed:
Feb 23, 2011
Appl. No.:
13/033600
Inventors:
Dehai Kong - Cupertino CA, US
International Classification:
G06Q 30/00
US Classification:
705 145, 705 1449, 705 1453, 705 1454, 705 1473
Abstract:
An apparatus, system, and method are disclosed for individualized and dynamic advertisements delivery and display in cloud computing and ordinary Internet systems. The client updates the advertisement server periodically the user web browsing history and local media, advertisements play back log. The client updates the advertisement server the user geographical location. The advertisement server analyzes the user interest and geographical information from client, combining with the server information of client neighborhood events, client neighboring friends, traffic, weather condition. The advertisement server selects the advertisements, tags the selected advertisements, then pushes to the client local storage. Client takes the retrieved web content and selects the best fit advertisements from local storage with according to the time, date, as well as the information of browsing history, geographical information, neighborhood events, client neighboring friends, traffic, weather. The client constructs new web pages with the individualized advertisements. The individualized advertisements can be added to the original web pages, or replace original advertisements.
Dehai Te Kong from Cupertino, CA, age ~59 Get Report