Resumes
Resumes

Rfic Design Lead At St-Ericsson
View pagePosition:
RFIC design lead for Cellular transceiver at ST-Ericsson
Location:
Austin, Texas Area
Industry:
Semiconductors
Work:
ST-Ericsson since Mar 2009
RFIC design lead for Cellular transceiver
ST-NXP Wireless Feb 2008 - Feb 2009
65nm SoC architect for UWB
NXP Semiconductors Dec 2006 - Jan 2008
RFIC Architect Lead for a 45nm Bluetooth CMOS transceiver
Philips Semiconductors Jan 2005 - Nov 2006
RFIC Architect for 90nm CMOS WLAN transceivers
Philips Semiconductors Jan 2003 - Dec 2005
RFIC Design Engineer
RFIC design lead for Cellular transceiver
ST-NXP Wireless Feb 2008 - Feb 2009
65nm SoC architect for UWB
NXP Semiconductors Dec 2006 - Jan 2008
RFIC Architect Lead for a 45nm Bluetooth CMOS transceiver
Philips Semiconductors Jan 2005 - Nov 2006
RFIC Architect for 90nm CMOS WLAN transceivers
Philips Semiconductors Jan 2003 - Dec 2005
RFIC Design Engineer
Education:
IFSIC-Rennes 1991 - 1993
MSEE, Electrical Engineering
MSEE, Electrical Engineering
Skills:
Algorithms
GSM
Bluetooth
RF
PLL
IC
Analog
UMTS
LNA
SoC
CMOS
SiGe
Semiconductors
Verilog
EDA
VCO
Mobile Devices
Optimizations
WLAN
Wireless
Cellular Communications
CDMA2000
Mixed Signal
Microelectronics
Integrated Circuit Design
ASIC
GSM
Bluetooth
RF
PLL
IC
Analog
UMTS
LNA
SoC
CMOS
SiGe
Semiconductors
Verilog
EDA
VCO
Mobile Devices
Optimizations
WLAN
Wireless
Cellular Communications
CDMA2000
Mixed Signal
Microelectronics
Integrated Circuit Design
ASIC