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Darshit B Upadhyay

from Folsom, CA
Age ~41
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Also known as:
Darshi B Upadhyay
Connected to:
A Upadhyay, 75Anjuli E Upadhyay, 39Anup Upadhyaya, 55Archana Upadhyaya, 47Ashok S Upadhyaya, 47Ashutosh S Upadhyaya, 58Asit P Upadhyay, 59Bhavana Upadhyay, 43Bhoomi B Upadhyaya, 34Danny Upadhyay, 60

Darshit Upadhyay Phones & Addresses

  • Folsom, CA
  • Chandler, AZ
  • Sunnyvale, CA
  • Santa Clara, CA
  • Sacramento, CA

Work

Company: Intel corporation Apr 2017 Position: Technical lead engineer

Education

Degree: Master of Science, Masters School / High School: California State University - Sacramento 2006 to 2008 Specialities: Electrical Engineering

Skills

Dft • Soc • Vlsi • Debugging • Ic • Fpga • Failure Analysis • Fault Isolation • Certified Scrum Master Csm • Atpg • Functional Testing • Otpl • Perl • Test Automation • Synopsys Tools • Semiconductors • Automatic Test Pattern Generation • Field Programmable Gate Arrays • Integrated Circuits • System on A Chip • Embedded Systems • Hardware Architecture • Very Large Scale Integration • Simulations • Verilog

Industries

Semiconductors

Resumes

Resumes

Darshit Upadhyay Photo 1

Technical Lead Engineer

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Location:
Folsom, CA
Industry:
Semiconductors
Work:
Intel Corporation
Technical Lead Engineer
Intel Corporation Jan 1, 2014 - Mar 2017
Senior Product Development and Dft Engineer
Intel Corporation Apr 2013 - Dec 2013
Senior Product Development Engineer
Intel Corporation Feb 2009 - Mar 2013
Product Development Engineer
Intel Corporation Jan 2008 - Feb 2009
Logic Design Intern
Education:
California State University - Sacramento 2006 - 2008
Master of Science, Masters, Electrical Engineering Saurashtra University, Rajkot 2001 - 2005
Bachelor of Engineering, Bachelors, Electrical Engineering Nirma University, Ahmedabad, Gujarat, India
Masters, Master of Technology
Skills:
Dft
Soc
Vlsi
Debugging
Ic
Fpga
Failure Analysis
Fault Isolation
Certified Scrum Master Csm
Atpg
Functional Testing
Otpl
Perl
Test Automation
Synopsys Tools
Semiconductors
Automatic Test Pattern Generation
Field Programmable Gate Arrays
Integrated Circuits
System on A Chip
Embedded Systems
Hardware Architecture
Very Large Scale Integration
Simulations
Verilog
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Darshit B Upadhyay from Folsom, CA, age ~41 Get Report