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Darrell J Slupek

from Austin, TX
Age ~66
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Also known as:
Darrell John Slupek, Darrell J Super, Darrell John Slupa, Darrel Slupek, Darrell John K
Phone and address:
2201 Pennsylvania Ave #A, Austin, TX 78702
Related to:
Ruth M Richter, 53Kelley L Slupek, 58Paul Kelly, 61Kelly SlupekJoseph F Collier, 89Shelby N Slupek, 28Shelby N SlupekKerrie Collier, 62Rachel E Richter, 56Jeremy RichterLynne L Anderson, 82
Connected to:
Marcin Slupek, 47Kathy E Slupik, 71Frederick L Slupske, 72Patsy J Slupski, 72Theresa A Slupski, 68Brad E Slurff, 48James F Slurff, 65Bettina A Slusar, 61Brian L Slusar, 68Curtis A Slusar, 83

Darrell Slupek Phones & Addresses

  • 2201 Pennsylvania Ave #A, Austin, TX 78702
  • 5701 Tahoma Pl, Austin, TX 78759 (512) 335-0088 (512) 335-6618
  • 11729 Bell Ave #A, Austin, TX 78759
  • Houston, TX
  • Albuquerque, NM

Resumes

Resumes

Darrell Slupek Photo 1

Senior Pcb Designer And Consultant

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Location:
Austin, TX
Industry:
Computer Hardware
Work:
Ocarina Networks Feb 1989 - Feb 2008
Lead Pcb Designer and Engineer
Nxp Semiconductors Feb 1989 - Feb 2008
Senior Pcb Designer and Consultant
Education:
Nait (Northern Alberta Institute of Technology) 1980 - 1982
Archbishop Macdonald High School 1974 - 1977
Skills:
Pcb Design
Signal Integrity
Design For Manufacturing
Analog
Circuit Design
Board Layout
Allegro
Cad
Orcad
Embedded Systems
Ddr2
Schematic Capture
Semiconductors
Testing
Electronics
Usb
Cadence
Hardware Architecture
Debugging
Electrical Engineering
Product Development
Altium Designer
Rf
Pads
Engineering Management
Hardware
Power Supplies
Dft
Eda
Windchill
Digital Electronics
Product Lifecycle Management
Digital Signal Processors
Vhdl
Simulations
Analog Circuit Design
Fpga
Pcie
Xilinx
Mixed Signal
Product Design
Software Documentation
Integrated Circuit Design
Pro Engineer
Computer Architecture
Firmware
Engineering
Asic
Processors
Modelsim
Darrell Slupek Photo 2

Darrell Slupek

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Location:
Austin, TX
Industry:
Computer Hardware
Darrell Slupek Photo 3

Darrell J . Slupek

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Darrell Slupek Photo 4

Darrell J . Slupek

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Business Records

Name / Title
Company / Classification
Phones & Addresses
Darrell J. Slupek
President
D. & J. Finance & Lending LC
5114 Balcones Wood Dr, Austin, TX 78759
Darrell J Slupek
President
QUICK LEASE LC
5114 Balcones Wood Dr STE 307, Austin, TX 78759
13604 Caldwell Dr #60, Austin, TX 78750
Darrell J. Slupek
VP, MM
D. & J. Motors LC
11917 Oak Knl Dr, Austin, TX 78759

Publications

Us Patents

Method Of Processing A Circuit Board

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US Patent:
7676920, Mar 16, 2010
Filed:
Oct 16, 2006
Appl. No.:
11/549869
Inventors:
Sandor T. Farkas - Round Rock TX, US
Hector F. Martinez - Austin TX, US
Bhavesh Patel - Austin TX, US
Indrani Paul - Round Rock TX, US
Darrell J. Slupek - Austin TX, US
Aubrey Sparkman - Austin TX, US
Assignee:
Dell Products L.P. - Round Rock TX
International Classification:
H01K 3/10
G01R 31/02
US Classification:
29852, 29830, 29846, 324754, 324759, 324765
Abstract:
A test coupon on a printed circuit board used for verifying that vias in the printed circuit board are back drilled to a proper predetermined depth. Use of the coupon involves correlating a via on the board to a via of a test coupon drilling the board via and the test coupon via to substantially the same depth, where the depth is predetermined based on the board via. Then measuring the impedance of the test coupon to reveal the actual depth of the back drilling of the coupon via. Knowing the actual back drill depth of the coupon via is used to verify the back drill depth of the board via.

Printed Circuit Board Manufacturing Method For Through Hole Components With A Metal Case

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US Patent:
58868780, Mar 23, 1999
Filed:
Jan 21, 1997
Appl. No.:
8/786158
Inventors:
Gita P. Khadem - Austin TX
Darrell J. Slupek - Austin TX
Assignee:
Dell USA, L.P. - Round Rock TX
International Classification:
H05K 111
US Classification:
361770
Abstract:
The present application describes a through-hole component insulator and assembly process which has the advantages of preventing solder from contacting the metal case of a through-hole component without an addition step or additional material from the standard fabrication process for a printed circuit board. The printed circuit board of the present invention includes a printed ink spacer disposed beneath the through-hole component wherein the printed ink spacer is included with a standard silk-screen artwork layer in the printed circuit board design stage. The printed ink spacer raises the through-hole component from the printed circuit board surface to prevent solder from contacting the metal case of the through-hole component during the printed circuit board soldering stage. Using a silk-screen artwork layer which includes at least one printed ink spacer in the artwork, the printed ink spacer is deposited during deposition of a standard printed design on the printed circuit board fabrication.

Pad With Indentations Surface Mount

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US Patent:
60693231, May 30, 2000
Filed:
Jan 21, 1997
Appl. No.:
8/786159
Inventors:
Darrell J. Slupek - Austin TX
Becky J. Clowers - Round Rock TX
Assignee:
Dell USA, L.P. - Round Rock TX
International Classification:
H05K 116
US Classification:
174260
Abstract:
A surface mount pad and a component to be soldered onto the pad includes a main portion and two extension portions coupled to the main portion. The surface mount pad has an indentation which is defined by the extension portions. The portions extend from the main portion on opposing sides of the indentation. The extension portions are positioned to extend from underneath the component lead. The indentation extends underneath the component lead.

Trace Conductor Layout Configuration For Preserving Signal Integrity In Control Boards Requiring Minimum Connector Stub Separation

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US Patent:
55719961, Nov 5, 1996
Filed:
Jan 17, 1995
Appl. No.:
8/375327
Inventors:
N. Deepak Swamy - Austin TX
Victor K. Pecone - Austin TX
Darrell Slupek - Austin TX
Assignee:
Dell USA, L.P. - Austin TX
International Classification:
H05K 118
H05K 114
US Classification:
174261
Abstract:
A circuit board is provided having a plurality of vias and uniformly spaced connector stubs arranged upon one or both outer surfaces of the control board. Sets of trace conductors are formed within the control board between the vias. The trace conductors are arranged in two planes within the control board, wherein trace conductors within one plane are laterally offset from trace conductors in the other plane. Laterally offset trace conductors allow close spacing of the trace conductor planes while maximizing the spacing between trace conductors and corresponding reference conductors also placed within the control board. Additionally, the trace conductors are serpentine-shaped when viewed from a perspective perpendicular to the planar surface of the control board. The serpentine shape, in conjunction with carefully controlled spacing between planes of trace conductors as well as between the trace conductor planes and reference conductors, provides high impedance trace conductors in a limited space area necessary to meet SCSI specifications.

Apparatus For Multi-Component Pcb Mounting

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US Patent:
56837887, Nov 4, 1997
Filed:
Jan 29, 1996
Appl. No.:
8/592947
Inventors:
Becky Dugan - Round Rock TX
Darrell J. Slupek - Austin TX
Assignee:
Dell USA, L.P. - Round Rock TX
International Classification:
B32B 300
H05K 702
H05K 710
H01R 900
US Classification:
428209
Abstract:
A printed circuit board includes a multi-component mounting footprint for mounting one of several possible differently sized discrete component packages on the circuit board. The multi-component mounting footprint includes a first mounting pad which has two connection points for mounting a connector on one of two different sized components. The footprint also includes a second mounting pad which is symmetric to the first mounting pad. About the mounting pads are cut outs which prevent solder buildup when either one of two different sized components are mounted thereon.
Control profile
Darrell J Slupek from Austin, TX, age ~66 Get Report