Daniel Owen Gudmundson

7310119, Dec 18, 2007

Jun 7, 2004

10/862685

Rahul Singh - Austin TX, US
Daniel O. Gudmundson - Dripping Springs TX, US
James A. Antone - Austin TX, US

Cirrus Logic, Inc. - Austin TX

H04N 9/78

348666, 348667

An adaptive circuit and method for separating luminance and chrominance components from a composite video signal by deriving three input lines from the composite video signal, determining whether any luminance similarity exists among the three input lines, and then selectively enabling a component filter based on any luminance similarity. If no luminance similarity exists among all three of the input lines, then a subtractive comb filter is enabled to maintain high vertical luminance resolution. If luminance similarity exists among all three of the input lines, then an additive comb filter is enabled. The additive comb filter performs three-line averaging when a high degree of similarity exists among all three consecutive input lines to minimize cross-chroma artifacts on lines that are similar. Chrominance similarity among the three input lines can also be determined by generating first and second chrominance values using different pairs of the three input lines, computing a difference of the first and second chrominance values, and comparing the chroma difference to a threshold value. If no luminance similarity exists between any of the three input lines or no chrominance similarity exists (i. e.

7400362, Jul 15, 2008

Dec 16, 2004

11/015756

Daniel Gudmundson - Austin TX, US
Shyam Somayajula - Austin TX, US
Ahsan Habib Chowdhury - Austin TX, US
James A. Antone - Austin TX, US
Rahul Singh - Austin TX, US

Cirrus Logic, Inc. - Austin TX

H04N 7/01
G05F 1/40

348607, 323280

A system in which drooping of the video levels due to leakage currents and proper DC bias level is addressed by providing a charge into the video signal to offset the leakage currents and to provide DC bias. To determine the leakage current level, measurements are made measuring the voltages of the syncs and the blanking intervals. To determine the DC bias, a measurement is made of the sync. Over a series of video lines these measurements are averaged. If the average is below the desired level, a charge is provided via a current source to the incoming signal. By having the current source provide charge during each video line, droop is reduced and the proper DC bias is provided.

7423697, Sep 9, 2008

Dec 16, 2004

11/015728

Daniel Gudmundson - Austin TX, US
Ahsan Habib Chowdury - Austin TX, US
James A. Antone - Austin TX, US
Rahul Singh - Austin TX, US

Cirrus Logic, Inc. - Austin TX

H04N 7/18

348691

A system in which drooping of the video levels due to leakage currents and proper DC bias level is addressed by providing a charge into the video signal to offset the leakage currents and to provide DC bias. To determine the leakage current level, measurements are made measuring the voltages of the syncs and the blanking intervals. To determine the DC bias, a measurement is made of the sync. Over a series of video lines these measurements are averaged. If the average is below the desired level, a charge is provided via a current source to the incoming signal. By having the current source provide charge during each video line, droop is reduced and the proper DC bias is provided.

7538823, May 26, 2009

Sep 23, 2005

11/234788

Rahul Singh - Austin TX, US
James Antone - Austin TX, US
John Laurence Melanson - Austin TX, US
Daniel O. Gudmundson - Austin TX, US

Cirrus Logic, Inc. - Austin TX

H04N 9/78

348663, 348667, 348665

A method of separating a chroma data component from a video data stream includes determining a phase relationship between a color burst in digital video data samples of a composite video signal and a local clock signal which processes the digital video data samples. In response to determining the phase relationship, interpolation filtering is performed on the digital video data samples corresponding to first and second display lines to generate phase aligned video data samples. Adaptive filtering is then performed utilizing the phase aligned video data samples corresponding to the first and second display lines to separate the chroma component from the digital video data samples corresponding to the first display line.

20060077296, Apr 13, 2006

Oct 13, 2004

10/964556

Daniel Gudmundson - Austin TX, US
John Melanson - Austin TX, US
Rahul Singh - Austin TX, US
Ahsan Chowdhury - Austin TX, US

H04N 11/00

348497000, 348572000

A video decoder in which the video source clock is generated entirely in the digital domain is disclosed herein. By creating a virtual version of the source clock in a numeric oscillator, the amount of noise in the system is substantially reduced. Furthermore, by transferring the digitized video signal, sampled with an asynchronous crystal clock, into the source clock domain, the accuracy of the brightness (amplitude) and color (phase) information can be greatly enhanced.

20060077303, Apr 13, 2006

Oct 13, 2004

10/964550

Daniel Gudmundson - Austin TX, US
Shyam Somayajula - Austin TX, US

H03M 1/12

348678000, 348572000

A video decoder in which 1) resolution quality can be improved for a given bit count analog-to-digital converter, 2) a lower bit count analog-to-digital converter can be used with substantially similar quality or 3) a combination of improved resolution quality with a lower bit count analog-to-digital converter can be done. In the preferred embodiment, a DC bias is added to the video signal after the sync portion of the composite signal has been received and prior to the active video being received. This bias is then removed after the end of the active video period. By applying this bias, the DC voltage level of the video signals is actually reduced, so that the full scale value of the analog-to-digital conversion process can also be reduced. Thus, compared to using an unbiased signal, increased A/D converter resolution is obtained. In an alternative embodiment, the sync portion can be biased upwardly during the front porch and then be returned during the back porch.

20060078054, Apr 13, 2006

Oct 13, 2004

10/964547

Daniel Gudmundson - Austin TX, US
John Melanson - Austin TX, US
Rahul Singh - Austin TX, US
James Antone - Austin TX, US
Ahsan Chowdhury - Austin TX, US
Krishnan Subramoniam - Austin TX, US

H04N 11/02
H04N 11/04
H04N 7/12
H04B 1/66

375240250

Video decoder systems in which both the analog-to-digital converter and the composite decoder are driven by the stable sample clock, such as a crystal source. The outputs of the composite decoder are provided to a source rate converter, having an output that is provided to a digital output formatter. The digital output formatter is driven by the output clock, which may be locked to the source clock if desired. The output clock is developed by a clock generator which may be one of several different types, including a fractional N synthesizer, a direct digital synthesizer or a puncture clock.