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Craig Dalley Phones & Addresses

  • 4109 Panther Ridge Ln, Plano, TX 75074 (972) 422-6449 (972) 423-3807
  • 2604 Countess Dr, Plano, TX 75074 (972) 422-6449
  • Dallas, TX
  • Columbus, OH
  • Colton, TX

Industries

Semiconductors

Resumes

Resumes

Craig Dalley Photo 1

Craig Dalley

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Location:
4109 Panther Ridge Ln, Plano, TX 75074
Industry:
Semiconductors

Publications

Us Patents

Innovative Dual-Channel Serial Interface Circuit Scheme

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US Patent:
6192430, Feb 20, 2001
Filed:
Feb 25, 1998
Appl. No.:
9/030752
Inventors:
Richard E. Downing - Allen TX
George Paul Eaves - Richardson TX
Craig Lance Dalley - Plano TX
Ian Lloyd Bower - Dallas TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 1300
G06F 300
US Classification:
710 61
Abstract:
A mixed-signal processor (MSP) chip with a flexible serial interface which simultaneously accommodates two serial ports on a reduced number of pins. The pin definitions of these serial ports are configured to function well with several different external chips. Any two of these chips, or two of any one of these chips, may be used concurrently by the present MSP. When used with chips that require it, the present MSP chip provides a clock signal to each of these. When used with other chips, the MSP will can receive a clock signal from an external chip, and will then pass this signal through to any chip on the other of the two serial ports.

Memory Interface Supporting Access To Memories Using Different Data Lengths

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US Patent:
61417394, Oct 31, 2000
Filed:
Oct 23, 1997
Appl. No.:
8/956411
Inventors:
John D. Provence - Mesquite TX
Ian L. Bower - Dallas TX
Paul Eaves - Garland TX
Craig L. Dalley - Plano TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 1202
US Classification:
711211
Abstract:
A computing device (10) includes a processor (14) coupled to a memory interface (28). The memory interface (28) supports access to a variety of memories (12) using at least two different data lengths. The memory interface (28) includes an address register (50, 52) for receiving addressing information to access the memory (12). A mode bit (80) and a high/low bit (82) in the address register (50, 52) determine the different operating modes of the memory interface (28).
Craig L Dalley from Plano, TX, age ~62 Get Report