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Christopher N Robinett

from Arlington, TX
Age ~50
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Also known as:
Christopher Nathan Robinett, Chris N Robinett
Phone and address:
515 Ashmede Ct, Arlington, TX 76013
(817) 265-0015
Related to:
Alice M Britt, 71Brian Britt, 59Sammie G Dwyer, 85Jennifer E Dwyer, 52Michael Ball
Connected to:
Alyssa A Robinet, 40Amber J Robinett, 36Beaver R Robinette, 92Bruce Robinett, 61Carl Robinette, 69Carol K Robinett, 74Carole J Robinette, 78Caroline J Robinette, 52Cassie D Robinette, 38Catherine A Robinette, 76

Christopher Robinett Phones & Addresses

  • 515 Ashmede Ct, Arlington, TX 76013 (817) 265-0015
  • 6001 Merrymount Rd, Fort Worth, TX 76107 (817) 377-1158 (817) 377-1588
  • San Antonio, TX
  • Joshua, TX
  • Cleburne, TX
  • Abilene, TX
  • Dallas, TX
  • Irving, TX

Work

Company: Hydra rig nov - Fort Worth, TX Sep 2011 Position: Repair tech

Education

School / High School: Cleburne High School- Cleburne, TX 1997 Specialities: Diploma in school I took auto body and auto repair

Skills

Construction • Supervisory Skills • Construction Management • Construction Safety • Piping • Contractors • Preventive Maintenance • Welding • Blueprint Reading • Metal Fabrication • Factory • Process Scheduler • Maintenance

Industries

Construction

Resumes

Resumes

Christopher Robinett Photo 1

Superintendent

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Location:
1320 Blazing Star Trl, Burleson, TX 76028
Industry:
Construction
Work:
Quantum Mechanical Services
Superintendent
Infinity Contractors Int'l Ltd Mar 2018 - Sep 2018
Superintendent
Vlp Contractors, Llc Jul 2017 - Mar 2018
Project Superintendent
Alpha Industries, Inc. Jul 2017 - Mar 2018
Millwright Superintendent
Polk Mechanical Apr 2013 - Jul 2016
Millwright
Education:
Cleburne High School 1994 - 1997
Skills:
Construction
Supervisory Skills
Construction Management
Construction Safety
Piping
Contractors
Preventive Maintenance
Welding
Blueprint Reading
Metal Fabrication
Factory
Process Scheduler
Maintenance
Christopher Robinett Photo 2

Christopher Robinett Joshua, TX

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Work:
Hydra Rig NOV
Fort Worth, TX
Sep 2011 to Jan 2013
Repair Tech
Self Employed

Dec 2010 to Sep 2011
Handyman
R and K Construction
Bangs, TX
Aug 2009 to Dec 2010
Mechanic
Sweetwater Transfer Services
Quitman, AR
Feb 2009 to Jun 2009
Pumper/ service mechanic
Stallion Oilfield Services
Cleburne, TX
Feb 2008 to Feb 2009
Mechanic
O'Reilly Auto Parts
Cleburne, TX
Mar 2007 to Jan 2008
RSS/ Night Manager
Core Test Geo-Tech Drilling
Addison, TX
Nov 2004 to Apr 2006
Geo Tech Driller
Education:
Cleburne High School
Cleburne, TX
1997
Diploma in school I took auto body and auto repair

Publications

Us Patents

Reducing Contamination Induced Scumming, For Semiconductor Device, By Ashing

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US Patent:
6372658, Apr 16, 2002
Filed:
Sep 21, 1998
Appl. No.:
09/157899
Inventors:
David Ziger - San Antonio TX
Christopher Robinett - San Antonio TX
Ramiro Solis - Bandera TX
Assignee:
Koninklijke Philips Electronics N.V. (KPENV) - Eindhoven
International Classification:
H01L 21302
US Classification:
438725, 430291, 430313
Abstract:
A semiconductor device is manufactured using an ashing process to eliminate the adverse effects of contamination, such as amine-airborne contamination. Consistent with one embodiment of the present invention, the semiconductor device is formed by applying a DUV-type photoresist over the wafer surface, exposing the photoresist to DUV light, baking the wafer, and then ashing the wafer in a highly-oxidized environment to remove insoluble amine-related resist.

Method For Optimizing A Gap For Plasma Processing

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US Patent:
58795731, Mar 9, 1999
Filed:
Aug 12, 1997
Appl. No.:
8/909660
Inventors:
Christopher T. Robinett - San Antonio TX
Assignee:
VLSI Technology, Inc. - DE
International Classification:
C23F 102
US Classification:
216 59
Abstract:
An optimal gap is determined between a lower electrode and an upper electrode in a plasma processing device. A gap is set between the lower electrode and the upper electrode, and a substrate is processed in the plasma processing chamber. The processing results are obtained, and the processing rate and uniformity are determined from the processing results. The processing rate and uniformity are plotted with the gap setting. The steps of setting, processing, obtaining, determining, and plotting are repeated for additional substrates, the gap setting being different for each substrate. The optimal gap setting is selected as the gap setting corresponding to an optimal processing rate and an optimal uniformity.

Fitted Endpoint System

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US Patent:
59649801, Oct 12, 1999
Filed:
Jun 23, 1998
Appl. No.:
9/103624
Inventors:
Christopher T. Robinett - San Antonio TX
Assignee:
VLSI Technology, Inc. - San Jose CA
International Classification:
H01L 21306
US Classification:
156345
Abstract:
A processor is provided for an improved semiconductor etching system which generates a series of multi-bit digital output code words. The processor provides an endpoint detector for determining if one of the digital output code word has reached a predetermined endpoint level and for generating a control signal to stop etching of a wafer. The processor further provides a standard endpoint curve corresponding to standard etching of a standard wafer. A normalizer is provided for normalizing the current endpoint curve generated from the series of multi-bit digital code words for a wafer being etched with respect to the standard endpoint curve and for providing a normalized current endpoint curve. A comparator fits and compares the normalized current endpoint curve for a wafer being etched to the standard endpoint curve, where the comparator includes a generator for generating a quality index number for the wafer corresponding to the cumulative area between the normalized current endpoint curve for a wafer being etched and the standard endpoint curve.

Reducing Contamination Induced Scumming, For Semiconductor Device, By Acid Treatment

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US Patent:
63098040, Oct 30, 2001
Filed:
Sep 21, 1998
Appl. No.:
9/157898
Inventors:
David Ziger - San Antonio TX
Christopher Robinett - San Antonio TX
Assignee:
Philips Semiconductor, Inc. - Tarrytown NY
International Classification:
G03F 700
US Classification:
430322
Abstract:
A semiconductor device is manufactured using an acid treatment process to eliminate the adverse effects of contamination, such as amine-airborne contamination. Consistent with one embodiment of the present invention, the semiconductor device is formed by applying a DUV-type photoresist over the wafer surface, exposing the photoresist to DUV light, treating the exposed photoresist with an acid vapor, and thereafter baking the exposed wafer.
Control profile
Christopher N Robinett from Arlington, TX, age ~50 Get Report